X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdePkg%2FLibrary%2FBaseLib%2FBaseLib.inf;h=80d00ebed75ba00e25a257d3542e00f92cf5cccc;hb=da351bdbe2076e06ecde95c9f563784c8d53af46;hp=35ca89b28451ba1554d4520b24898237ed3fe80d;hpb=b56da74aaf5faf6397dbca1c3274c630c5ae2aba;p=mirror_edk2.git
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 35ca89b284..80d00ebed7 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -1,7 +1,7 @@
## @file
# Base Library implementation.
#
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.
+# Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
#
@@ -67,6 +67,8 @@
BaseLibInternals.h
[Sources.Ia32]
+ Ia32/WriteTr.nasm
+
Ia32/Wbinvd.c | MSFT
Ia32/WriteMm7.c | MSFT
Ia32/WriteMm6.c | MSFT
@@ -327,7 +329,8 @@
Ia32/DivU64x32Remainder.asm | INTEL
Ia32/DivU64x32.nasm| INTEL
Ia32/DivU64x32.asm | INTEL
- Ia32/DisablePaging32.asm | INTEL
+ Ia32/DisablePaging32.nasm| INTEL
+ Ia32/DisablePaging32.asm | INTEL
Ia32/DisableInterrupts.nasm| INTEL
Ia32/DisableInterrupts.asm | INTEL
Ia32/CpuPause.nasm| INTEL
@@ -358,6 +361,7 @@
Ia32/EnableDisableInterrupts.S | GCC
Ia32/EnablePaging64.nasm| GCC
Ia32/EnablePaging64.S | GCC
+ Ia32/DisablePaging32.nasm| GCC
Ia32/DisablePaging32.S | GCC
Ia32/EnablePaging32.nasm| GCC
Ia32/EnablePaging32.S | GCC
@@ -408,6 +412,7 @@
Ia32/InternalSwitchStack.c | MSFT
Ia32/InternalSwitchStack.c | INTEL
Ia32/InternalSwitchStack.S | GCC
+ Ia32/InternalSwitchStack.nasm | GCC
Ia32/Non-existing.c
Unaligned.c
X86WriteIdtr.c
@@ -425,6 +430,7 @@
X86EnablePaging32.c
X86DisablePaging64.c
X86DisablePaging32.c
+ X86RdRand.c
[Sources.X64]
X64/Thunk16.nasm
@@ -443,6 +449,7 @@
X64/EnableCache.asm
X64/DisableCache.nasm
X64/DisableCache.asm
+ X64/WriteTr.nasm
X64/CpuBreakpoint.c | MSFT
X64/WriteMsr64.c | MSFT
@@ -535,34 +542,62 @@
X64/ReadDs.asm | MSFT
X64/ReadCs.nasm| MSFT
X64/ReadCs.asm | MSFT
+ X64/WriteDr7.nasm| MSFT
X64/WriteDr7.asm | MSFT
+ X64/WriteDr6.nasm| MSFT
X64/WriteDr6.asm | MSFT
+ X64/WriteDr5.nasm| MSFT
X64/WriteDr5.asm | MSFT
+ X64/WriteDr4.nasm| MSFT
X64/WriteDr4.asm | MSFT
+ X64/WriteDr3.nasm| MSFT
X64/WriteDr3.asm | MSFT
+ X64/WriteDr2.nasm| MSFT
X64/WriteDr2.asm | MSFT
+ X64/WriteDr1.nasm| MSFT
X64/WriteDr1.asm | MSFT
+ X64/WriteDr0.nasm| MSFT
X64/WriteDr0.asm | MSFT
+ X64/ReadDr7.nasm| MSFT
X64/ReadDr7.asm | MSFT
+ X64/ReadDr6.nasm| MSFT
X64/ReadDr6.asm | MSFT
+ X64/ReadDr5.nasm| MSFT
X64/ReadDr5.asm | MSFT
+ X64/ReadDr4.nasm| MSFT
X64/ReadDr4.asm | MSFT
+ X64/ReadDr3.nasm| MSFT
X64/ReadDr3.asm | MSFT
+ X64/ReadDr2.nasm| MSFT
X64/ReadDr2.asm | MSFT
+ X64/ReadDr1.nasm| MSFT
X64/ReadDr1.asm | MSFT
+ X64/ReadDr0.nasm| MSFT
X64/ReadDr0.asm | MSFT
+ X64/WriteCr4.nasm| MSFT
X64/WriteCr4.asm | MSFT
+ X64/WriteCr3.nasm| MSFT
X64/WriteCr3.asm | MSFT
+ X64/WriteCr2.nasm| MSFT
X64/WriteCr2.asm | MSFT
+ X64/WriteCr0.nasm| MSFT
X64/WriteCr0.asm | MSFT
+ X64/ReadCr4.nasm| MSFT
X64/ReadCr4.asm | MSFT
+ X64/ReadCr3.nasm| MSFT
X64/ReadCr3.asm | MSFT
+ X64/ReadCr2.nasm| MSFT
X64/ReadCr2.asm | MSFT
+ X64/ReadCr0.nasm| MSFT
X64/ReadCr0.asm | MSFT
+ X64/ReadEflags.nasm| MSFT
X64/ReadEflags.asm | MSFT
+ X64/CpuBreakpoint.nasm| INTEL
X64/CpuBreakpoint.asm | INTEL
+ X64/WriteMsr64.nasm| INTEL
X64/WriteMsr64.asm | INTEL
+ X64/ReadMsr64.nasm| INTEL
X64/ReadMsr64.asm | INTEL
X64/RdRand.nasm| INTEL
X64/RdRand.asm | INTEL
@@ -652,30 +687,55 @@
X64/ReadDs.asm | INTEL
X64/ReadCs.nasm| INTEL
X64/ReadCs.asm | INTEL
+ X64/WriteDr7.nasm| INTEL
X64/WriteDr7.asm | INTEL
+ X64/WriteDr6.nasm| INTEL
X64/WriteDr6.asm | INTEL
+ X64/WriteDr5.nasm| INTEL
X64/WriteDr5.asm | INTEL
+ X64/WriteDr4.nasm| INTEL
X64/WriteDr4.asm | INTEL
+ X64/WriteDr3.nasm| INTEL
X64/WriteDr3.asm | INTEL
+ X64/WriteDr2.nasm| INTEL
X64/WriteDr2.asm | INTEL
+ X64/WriteDr1.nasm| INTEL
X64/WriteDr1.asm | INTEL
+ X64/WriteDr0.nasm| INTEL
X64/WriteDr0.asm | INTEL
+ X64/ReadDr7.nasm| INTEL
X64/ReadDr7.asm | INTEL
+ X64/ReadDr6.nasm| INTEL
X64/ReadDr6.asm | INTEL
+ X64/ReadDr5.nasm| INTEL
X64/ReadDr5.asm | INTEL
+ X64/ReadDr4.nasm| INTEL
X64/ReadDr4.asm | INTEL
+ X64/ReadDr3.nasm| INTEL
X64/ReadDr3.asm | INTEL
+ X64/ReadDr2.nasm| INTEL
X64/ReadDr2.asm | INTEL
+ X64/ReadDr1.nasm| INTEL
X64/ReadDr1.asm | INTEL
+ X64/ReadDr0.nasm| INTEL
X64/ReadDr0.asm | INTEL
+ X64/WriteCr4.nasm| INTEL
X64/WriteCr4.asm | INTEL
+ X64/WriteCr3.nasm| INTEL
X64/WriteCr3.asm | INTEL
+ X64/WriteCr2.nasm| INTEL
X64/WriteCr2.asm | INTEL
+ X64/WriteCr0.nasm| INTEL
X64/WriteCr0.asm | INTEL
+ X64/ReadCr4.nasm| INTEL
X64/ReadCr4.asm | INTEL
+ X64/ReadCr3.nasm| INTEL
X64/ReadCr3.asm | INTEL
+ X64/ReadCr2.nasm| INTEL
X64/ReadCr2.asm | INTEL
+ X64/ReadCr0.nasm| INTEL
X64/ReadCr0.asm | INTEL
+ X64/ReadEflags.nasm| INTEL
X64/ReadEflags.asm | INTEL
X64/Non-existing.c
@@ -696,6 +756,7 @@
X86EnablePaging32.c
X86DisablePaging64.c
X86DisablePaging32.c
+ X86RdRand.c
X64/GccInline.c | GCC
X64/Thunk16.S | XCODE
X64/SwitchStack.nasm| GCC
@@ -763,8 +824,9 @@
[Sources.ARM]
Arm/InternalSwitchStack.c
Arm/Unaligned.c
- Math64.c | RVCT
-
+ Math64.c | RVCT
+ Math64.c | MSFT
+
Arm/SwitchStack.asm | RVCT
Arm/SetJumpLongJump.asm | RVCT
Arm/DisableInterrupts.asm | RVCT
@@ -773,7 +835,16 @@
Arm/CpuPause.asm | RVCT
Arm/CpuBreakpoint.asm | RVCT
Arm/MemoryFence.asm | RVCT
-
+
+ Arm/SwitchStack.asm | MSFT
+ Arm/SetJumpLongJump.asm | MSFT
+ Arm/DisableInterrupts.asm | MSFT
+ Arm/EnableInterrupts.asm | MSFT
+ Arm/GetInterruptsState.asm | MSFT
+ Arm/CpuPause.asm | MSFT
+ Arm/CpuBreakpoint.asm | MSFT
+ Arm/MemoryFence.asm | MSFT
+
Arm/Math64.S | GCC
Arm/SwitchStack.S | GCC
Arm/EnableInterrupts.S | GCC
@@ -796,6 +867,14 @@
AArch64/SetJumpLongJump.S | GCC
AArch64/CpuBreakpoint.S | GCC
+ AArch64/MemoryFence.asm | MSFT
+ AArch64/SwitchStack.asm | MSFT
+ AArch64/EnableInterrupts.asm | MSFT
+ AArch64/DisableInterrupts.asm | MSFT
+ AArch64/GetInterruptsState.asm | MSFT
+ AArch64/SetJumpLongJump.asm | MSFT
+ AArch64/CpuBreakpoint.asm | MSFT
+
[Packages]
MdePkg/MdePkg.dec