X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdePkg%2FLibrary%2FBaseLib%2FBaseLib.inf;h=c5f45ee3bbbdd525cdccccc950f8e7d164a15103;hb=345068d636e0096649afa0aaa2a98c2917827085;hp=41584b05a65a5d93f919b1237f6b4d727149348e;hpb=124ae239bb601cbfa377890dcf511da7a50137f4;p=mirror_edk2.git diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index 41584b05a6..c5f45ee3bb 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -330,16 +330,23 @@ Ia32/DisablePaging32.asm | INTEL Ia32/DisableInterrupts.nasm| INTEL Ia32/DisableInterrupts.asm | INTEL + Ia32/CpuPause.nasm| INTEL Ia32/CpuPause.asm | INTEL + Ia32/CpuIdEx.nasm| INTEL Ia32/CpuIdEx.asm | INTEL + Ia32/CpuId.nasm| INTEL Ia32/CpuId.asm | INTEL + Ia32/CpuBreakpoint.nasm| INTEL Ia32/CpuBreakpoint.asm | INTEL + Ia32/ARShiftU64.nasm| INTEL Ia32/ARShiftU64.asm | INTEL Ia32/Thunk16.nasm | INTEL Ia32/Thunk16.asm | INTEL Ia32/EnablePaging64.nasm| INTEL Ia32/EnablePaging64.asm | INTEL + Ia32/EnableCache.nasm| INTEL Ia32/EnableCache.asm | INTEL + Ia32/DisableCache.nasm| INTEL Ia32/DisableCache.asm | INTEL Ia32/RdRand.nasm| INTEL Ia32/RdRand.asm | INTEL @@ -358,7 +365,9 @@ Ia32/Mwait.S | GCC Ia32/Monitor.nasm| GCC Ia32/Monitor.S | GCC + Ia32/CpuIdEx.nasm| GCC Ia32/CpuIdEx.S | GCC + Ia32/CpuId.nasm| GCC Ia32/CpuId.S | GCC Ia32/LongJump.nasm| GCC Ia32/LongJump.S | GCC @@ -382,12 +391,15 @@ Ia32/RRotU64.S | GCC Ia32/LRotU64.nasm| GCC Ia32/LRotU64.S | GCC + Ia32/ARShiftU64.nasm| GCC Ia32/ARShiftU64.S | GCC Ia32/RShiftU64.nasm| GCC Ia32/RShiftU64.S | GCC Ia32/LShiftU64.nasm| GCC Ia32/LShiftU64.S | GCC + Ia32/EnableCache.nasm| GCC Ia32/EnableCache.S | GCC + Ia32/DisableCache.nasm| GCC Ia32/DisableCache.S | GCC Ia32/RdRand.nasm| GCC Ia32/RdRand.S | GCC @@ -417,18 +429,27 @@ [Sources.X64] X64/Thunk16.nasm X64/Thunk16.asm + X64/CpuIdEx.nasm X64/CpuIdEx.asm + X64/CpuId.nasm X64/CpuId.asm + X64/LongJump.nasm X64/LongJump.asm + X64/SetJump.nasm X64/SetJump.asm + X64/SwitchStack.nasm X64/SwitchStack.asm + X64/EnableCache.nasm X64/EnableCache.asm + X64/DisableCache.nasm X64/DisableCache.asm X64/CpuBreakpoint.c | MSFT X64/WriteMsr64.c | MSFT X64/ReadMsr64.c | MSFT + X64/RdRand.nasm| MSFT X64/RdRand.asm | MSFT + X64/CpuPause.nasm| MSFT X64/CpuPause.asm | MSFT X64/EnableDisableInterrupts.asm | MSFT X64/DisableInterrupts.asm | MSFT @@ -501,7 +522,9 @@ X64/CpuBreakpoint.asm | INTEL X64/WriteMsr64.asm | INTEL X64/ReadMsr64.asm | INTEL + X64/RdRand.nasm| INTEL X64/RdRand.asm | INTEL + X64/CpuPause.nasm| INTEL X64/CpuPause.asm | INTEL X64/EnableDisableInterrupts.asm | INTEL X64/DisableInterrupts.asm | INTEL @@ -591,15 +614,23 @@ X86DisablePaging32.c X64/GccInline.c | GCC X64/Thunk16.S | XCODE + X64/SwitchStack.nasm| GCC X64/SwitchStack.S | GCC + X64/SetJump.nasm| GCC X64/SetJump.S | GCC + X64/LongJump.nasm| GCC X64/LongJump.S | GCC X64/EnableDisableInterrupts.S | GCC X64/DisablePaging64.S | GCC + X64/CpuId.nasm| GCC X64/CpuId.S | GCC + X64/CpuIdEx.nasm| GCC X64/CpuIdEx.S | GCC + X64/EnableCache.nasm| GCC X64/EnableCache.S | GCC + X64/DisableCache.nasm| GCC X64/DisableCache.S | GCC + X64/RdRand.nasm| GCC X64/RdRand.S | GCC ChkStkGcc.c | GCC