X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=Omap35xxPkg%2FInterruptDxe%2FHardwareInterrupt.c;h=09e22b5921b0fd10c40dea6e91173c605890ee75;hb=8832c79d6439adc09d7cc89b22268899026ff7f8;hp=8ffdc0bec1e1a9e522f81906ced0c9bf9fe365e4;hpb=e9fc14b6e17de3ecc299d4f7f8a39c2cb0c55292;p=mirror_edk2.git

diff --git a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c
index 8ffdc0bec1..09e22b5921 100644
--- a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c
+++ b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c
@@ -1,9 +1,9 @@
 /** @file
-  Handle OMAP35xx interrupt controller 
+  Handle OMAP35xx interrupt controller
 
-  Copyright (c) 2008-2010, Apple Inc. All rights reserved.
-  
-  All rights reserved. This program and the accompanying materials
+  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+
+  This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
   http://opensource.org/licenses/bsd-license.php
@@ -31,8 +31,6 @@
 //
 // Notifications
 //
-VOID      *CpuProtocolNotificationToken = NULL;
-EFI_EVENT CpuProtocolNotificationEvent  = (EFI_EVENT)NULL;
 EFI_EVENT EfiExitBootServicesEvent      = (EFI_EVENT)NULL;
 
 
@@ -40,7 +38,7 @@ HARDWARE_INTERRUPT_HANDLER  gRegisteredInterruptHandlers[INT_NROF_VECTORS];
 
 /**
   Shutdown our hardware
-  
+
   DXE Core will disable interrupts and turn off the timer and disable interrupts
   after all the event handlers have run.
 
@@ -85,16 +83,16 @@ RegisterInterruptSource (
   if (Source > MAX_VECTOR) {
     ASSERT(FALSE);
     return EFI_UNSUPPORTED;
-  } 
-  
+  }
+
   if ((MmioRead32 (INTCPS_ILR(Source)) & INTCPS_ILR_FIQ) == INTCPS_ILR_FIQ) {
     // This vector has been programmed as FIQ so we can't use it for IRQ
-    // EFI does not use FIQ, but the debugger can use it to check for 
+    // EFI does not use FIQ, but the debugger can use it to check for
     // ctrl-c. So this ASSERT means you have a conflict with the debug agent
     ASSERT (FALSE);
     return EFI_UNSUPPORTED;
   }
-  
+
   if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {
     return EFI_INVALID_PARAMETER;
   }
@@ -127,17 +125,17 @@ EnableInterruptSource (
 {
   UINTN Bank;
   UINTN Bit;
-  
+
   if (Source > MAX_VECTOR) {
     ASSERT(FALSE);
     return EFI_UNSUPPORTED;
   }
-  
+
   Bank = Source / 32;
   Bit  = 1UL << (Source % 32);
-  
+
   MmioWrite32 (INTCPS_MIR_CLEAR(Bank), Bit);
-  
+
   return EFI_SUCCESS;
 }
 
@@ -161,17 +159,17 @@ DisableInterruptSource (
 {
   UINTN Bank;
   UINTN Bit;
-  
+
   if (Source > MAX_VECTOR) {
     ASSERT(FALSE);
     return EFI_UNSUPPORTED;
   }
-  
+
   Bank = Source / 32;
   Bit  = 1UL << (Source % 32);
-  
+
   MmioWrite32 (INTCPS_MIR_SET(Bank), Bit);
-  
+
   return EFI_SUCCESS;
 }
 
@@ -198,11 +196,11 @@ GetInterruptSourceState (
 {
   UINTN Bank;
   UINTN Bit;
-  
+
   if (InterruptState == NULL) {
     return EFI_INVALID_PARAMETER;
   }
-  
+
   if (Source > MAX_VECTOR) {
     ASSERT(FALSE);
     return EFI_UNSUPPORTED;
@@ -210,18 +208,18 @@ GetInterruptSourceState (
 
   Bank = Source / 32;
   Bit  = 1UL << (Source % 32);
-    
+
   if ((MmioRead32(INTCPS_MIR(Bank)) & Bit) == Bit) {
     *InterruptState = FALSE;
   } else {
     *InterruptState = TRUE;
   }
-  
+
   return EFI_SUCCESS;
 }
 
 /**
-  Signal to the hardware that the End Of Intrrupt state 
+  Signal to the hardware that the End Of Intrrupt state
   has been reached.
 
   @param This     Instance pointer for this protocol
@@ -239,7 +237,7 @@ EndOfInterrupt (
   )
 {
   MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
-  ArmDataSyncronizationBarrier ();
+  ArmDataSynchronizationBarrier ();
   return EFI_SUCCESS;
 }
 
@@ -264,22 +262,22 @@ IrqInterruptHandler (
 {
   UINT32                     Vector;
   HARDWARE_INTERRUPT_HANDLER InterruptHandler;
-  
+
   Vector = MmioRead32 (INTCPS_SIR_IRQ) & INTCPS_SIR_IRQ_MASK;
 
   // Needed to prevent infinite nesting when Time Driver lowers TPL
   MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
-  ArmDataSyncronizationBarrier ();
-  
+  ArmDataSynchronizationBarrier ();
+
   InterruptHandler = gRegisteredInterruptHandlers[Vector];
   if (InterruptHandler != NULL) {
     // Call the registered interrupt handler.
     InterruptHandler (Vector, SystemContext);
   }
-  
+
   // Needed to clear after running the handler
   MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
-  ArmDataSyncronizationBarrier ();
+  ArmDataSynchronizationBarrier ();
 }
 
 //
@@ -298,37 +296,6 @@ EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol = {
   EndOfInterrupt
 };
 
-//
-// Notification routines
-//
-VOID
-CpuProtocolInstalledNotification (
-  IN EFI_EVENT   Event,
-  IN VOID        *Context
-  )
-{
-  EFI_STATUS              Status;
-  EFI_CPU_ARCH_PROTOCOL   *Cpu;
-  
-  //
-  // Get the cpu protocol that this driver requires.
-  //
-  Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
-  ASSERT_EFI_ERROR(Status);
-
-  //
-  // Unregister the default exception handler.
-  //
-  Status = Cpu->RegisterInterruptHandler (Cpu, EXCEPT_ARM_IRQ, NULL);
-  ASSERT_EFI_ERROR(Status);
-
-  //
-  // Register to receive interrupts
-  //
-  Status = Cpu->RegisterInterruptHandler (Cpu, EXCEPT_ARM_IRQ, IrqInterruptHandler);
-  ASSERT_EFI_ERROR(Status);
-}
-
 /**
   Initialize the state information for the CPU Architectural Protocol
 
@@ -347,6 +314,7 @@ InterruptDxeInitialize (
   )
 {
   EFI_STATUS  Status;
+  EFI_CPU_ARCH_PROTOCOL   *Cpu;
 
   // Make sure the Interrupt Controller Protocol is not already installed in the system.
   ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
@@ -356,17 +324,28 @@ InterruptDxeInitialize (
   MmioWrite32 (INTCPS_MIR(1), 0xFFFFFFFF);
   MmioWrite32 (INTCPS_MIR(2), 0xFFFFFFFF);
   MmioOr32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
- 
+
   Status = gBS->InstallMultipleProtocolInterfaces(&gHardwareInterruptHandle,
                                                   &gHardwareInterruptProtocolGuid,   &gHardwareInterruptProtocol,
                                                   NULL);
   ASSERT_EFI_ERROR(Status);
-  
-  // Set up to be notified when the Cpu protocol is installed.
-  Status = gBS->CreateEvent(EVT_NOTIFY_SIGNAL, TPL_CALLBACK, CpuProtocolInstalledNotification, NULL, &CpuProtocolNotificationEvent);    
+
+  //
+  // Get the CPU protocol that this driver requires.
+  //
+  Status = gBS->LocateProtocol(&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
   ASSERT_EFI_ERROR(Status);
 
-  Status = gBS->RegisterProtocolNotify(&gEfiCpuArchProtocolGuid, CpuProtocolNotificationEvent, (VOID *)&CpuProtocolNotificationToken);
+  //
+  // Unregister the default exception handler.
+  //
+  Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, NULL);
+  ASSERT_EFI_ERROR(Status);
+
+  //
+  // Register to receive interrupts
+  //
+  Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, IrqInterruptHandler);
   ASSERT_EFI_ERROR(Status);
 
   // Register for an ExitBootServicesEvent