X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=OvmfPkg%2FAcpiTables%2FDsdt.asl;h=2c3a314af62a11ad99dc4c80440e28d5bc769dab;hb=0ab475c9a1d551a919430f3b6df6f652e4d2a3ed;hp=4c791c143141ea951a1b5b06cae13852878fd510;hpb=56daf8b90e208e6a32499775a104225f9989681c;p=mirror_edk2.git diff --git a/OvmfPkg/AcpiTables/Dsdt.asl b/OvmfPkg/AcpiTables/Dsdt.asl index 4c791c1431..2c3a314af6 100644 --- a/OvmfPkg/AcpiTables/Dsdt.asl +++ b/OvmfPkg/AcpiTables/Dsdt.asl @@ -12,13 +12,15 @@ **/ -DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { +DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 4) { // // System Sleep States // - Name (\_S0, Package () {5, 0, 0, 0}) - Name (\_S4, Package () {1, 0, 0, 0}) - Name (\_S5, Package () {0, 0, 0, 0}) + // We build S3 and S4 with GetSuspendStates() in + // "OvmfPkg/AcpiPlatformDxe/Qemu.c". + // + Name (\_S0, Package () {5, 0, 0, 0}) // Working + Name (\_S5, Package () {0, 0, 0, 0}) // Soft Off // // System Bus @@ -128,7 +130,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { ) }) - Method (_CRS, 0) { + Method (_CRS, 0, Serialized) { // // see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c" // @@ -194,31 +196,145 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { Return ( Package () { // - // Bus 0, Device 1 + // Bus 0; Devices 0 to 15 + // + Package () {0x0000FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x0000FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x0000FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x0000FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00}, + + // + // Bus 0, Device 1, Pin 0 (INTA) is special; it corresponds to the + // internally generated SCI (System Control Interrupt), which is + // always routed to GSI 9. By setting the third (= Source) field to + // zero, we could use the fourth (= Source Index) field to hardwire + // the pin to GSI 9 directly. + // + // That way however, in accordance with the ACPI spec's description + // of SCI, the interrupt would be treated as "active low, + // shareable, level", and that doesn't match qemu. // - Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00}, + // In QemuInstallAcpiMadtTable() [OvmfPkg/AcpiPlatformDxe/Qemu.c] + // we install an Interrupt Override Structure for the identity + // mapped IRQ#9 / GSI 9 (the corresponding bit being set in + // Pcd8259LegacyModeEdgeLevel), which describes the correct + // polarity (active high). As a consequence, some OS'en (eg. Linux) + // override the default (active low) polarity originating from the + // _PRT; others (eg. FreeBSD) don't. Therefore we need a separate + // link device just to specify a polarity that matches the MADT. + // + Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKS, 0x00}, + Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00}, Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00}, Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00}, - // - // Bus 0, Device 3 - // - Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00}, - Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00}, - Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00}, - Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00}, + + Package () {0x0002FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x0002FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x0002FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x0002FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00}, + + Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00}, + + Package () {0x0004FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x0004FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x0004FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x0004FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00}, + + Package () {0x0005FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x0005FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x0005FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x0005FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00}, + + Package () {0x0006FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x0006FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x0006FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x0006FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00}, + + Package () {0x0007FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x0007FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x0007FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x0007FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00}, + + Package () {0x0008FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x0008FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x0008FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x0008FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00}, + + Package () {0x0009FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x0009FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x0009FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x0009FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00}, + + Package () {0x000AFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x000AFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x000AFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x000AFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00}, + + Package () {0x000BFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x000BFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x000BFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x000BFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00}, + + Package () {0x000CFFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x000CFFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x000CFFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x000CFFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00}, + + Package () {0x000DFFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x000DFFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x000DFFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x000DFFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00}, + + Package () {0x000EFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x000EFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x000EFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x000EFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00}, + + Package () {0x000FFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x000FFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00}, + Package () {0x000FFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x000FFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00} } ) } // // PCI to ISA Bridge (Bus 0, Device 1, Function 0) + // "Low Pin Count" // Device (LPC) { Name (_ADR, 0x00010000) // - // PCI Interrupt Routing Configuration Registers + // The SCI cannot be rerouted or disabled with PIRQRC[A:D]; we only + // need this link device in order to specify the polarity. + // + Device (LNKS) { + Name (_HID, EISAID("PNP0C0F")) + Name (_UID, 0) + + Name (_STA, 0xB) // 0x1: device present + // 0x2: enabled and decoding resources + // 0x8: functioning properly + + Method (_SRS, 1, NotSerialized) { /* no-op */ } + Method (_DIS, 0, NotSerialized) { /* no-op */ } + + Name (_PRS, ResourceTemplate () { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { 9 } + // + // list of IRQs occupied thus far: 9 + // + }) + Method (_CRS, 0, NotSerialized) { Return (_PRS) } + } + + // + // PCI Interrupt Routing Configuration Registers, PIRQRC[A:D] // OperationRegion (PRR0, PCI_Config, 0x60, 0x04) Field (PRR0, ANYACC, NOLOCK, PRESERVE) { @@ -230,26 +346,21 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { // // _STA method for LNKA, LNKB, LNKC, LNKD + // Arg0[in]: value of PIRA / PIRB / PIRC / PIRD // Method (PSTA, 1, NotSerialized) { - If (And (Arg0, 0x80)) { - Return (0x9) + If (And (Arg0, 0x80)) { // disable-bit set? + Return (0x9) // "device present" | "functioning properly" } Else { - Return (0xB) + Return (0xB) // same | "enabled and decoding resources" } } - // - // _DIS method for LNKA, LNKB, LNKC, LNKD - // - Method (PDIS, 1, NotSerialized) { - Or (Arg0, 0x80, Arg0) - } - // // _CRS method for LNKA, LNKB, LNKC, LNKD + // Arg0[in]: value of PIRA / PIRB / PIRC / PIRD // - Method (PCRS, 1, NotSerialized) { + Method (PCRS, 1, Serialized) { // // create temporary buffer with an Extended Interrupt Descriptor // whose single vector defaults to zero @@ -279,19 +390,12 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { // _PRS resource for LNKA, LNKB, LNKC, LNKD // Name (PPRS, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { - 3, 4, 5, 7, 9, 10, 11, 12, 14, 15 - } + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) {5, 10, 11} + // + // list of IRQs occupied thus far: 9, 5, 10, 11 + // }) - // - // _SRS method for LNKA, LNKB, LNKC, LNKD - // - Method (PSRS, 2, NotSerialized) { - CreateDWordField (Arg1, 0x05, IRQW) - Store (IRQW, Arg0) - } - // // PCI IRQ Link A // @@ -300,10 +404,15 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { Name (_UID, 1) Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) } - Method (_DIS, 0, NotSerialized) { PDIS (PIRA) } + Method (_DIS, 0, NotSerialized) { + Or (PIRA, 0x80, PIRA) // set disable-bit + } Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) } Method (_PRS, 0, NotSerialized) { Return (PPRS) } - Method (_SRS, 1, NotSerialized) { PSRS (PIRA, Arg0) } + Method (_SRS, 1, NotSerialized) { + CreateDWordField (Arg0, 0x05, IRQW) + Store (IRQW, PIRA) + } } // @@ -314,10 +423,15 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { Name (_UID, 2) Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) } - Method (_DIS, 0, NotSerialized) { PDIS (PIRB) } + Method (_DIS, 0, NotSerialized) { + Or (PIRB, 0x80, PIRB) // set disable-bit + } Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) } Method (_PRS, 0, NotSerialized) { Return (PPRS) } - Method (_SRS, 1, NotSerialized) { PSRS (PIRB, Arg0) } + Method (_SRS, 1, NotSerialized) { + CreateDWordField (Arg0, 0x05, IRQW) + Store (IRQW, PIRB) + } } // @@ -328,10 +442,15 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { Name (_UID, 3) Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) } - Method (_DIS, 0, NotSerialized) { PDIS (PIRC) } + Method (_DIS, 0, NotSerialized) { + Or (PIRC, 0x80, PIRC) // set disable-bit + } Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) } Method (_PRS, 0, NotSerialized) { Return (PPRS) } - Method (_SRS, 1, NotSerialized) { PSRS (PIRC, Arg0) } + Method (_SRS, 1, NotSerialized) { + CreateDWordField (Arg0, 0x05, IRQW) + Store (IRQW, PIRC) + } } // @@ -339,13 +458,18 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { // Device (LNKD) { Name (_HID, EISAID("PNP0C0F")) - Name (_UID, 1) + Name (_UID, 4) Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) } - Method (_DIS, 0, NotSerialized) { PDIS (PIRD) } + Method (_DIS, 0, NotSerialized) { + Or (PIRD, 0x80, PIRD) // set disable-bit + } Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) } Method (_PRS, 0, NotSerialized) { Return (PPRS) } - Method (_SRS, 1, NotSerialized) { PSRS (PIRD, Arg0) } + Method (_SRS, 1, NotSerialized) { + CreateDWordField (Arg0, 0x05, IRQW) + Store (IRQW, PIRD) + } } // @@ -358,6 +482,9 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02) IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02) IRQNoFlags () {2} + // + // list of IRQs occupied thus far: 9, 5, 10, 11, 2 + // }) } @@ -385,6 +512,9 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { Name(_CRS, ResourceTemplate () { IO (Decode16, 0x40, 0x40, 0x00, 0x04) IRQNoFlags () {0} + // + // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0 + // }) } @@ -396,6 +526,9 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { Name (_CRS, ResourceTemplate () { IO (Decode16, 0x70, 0x70, 0x00, 0x02) IRQNoFlags () {8} + // + // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8 + // }) } @@ -417,6 +550,9 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { Name (_CRS, ResourceTemplate () { IO (Decode16, 0xF0, 0xF0, 0x00, 0x10) IRQNoFlags () {13} + // + // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13 + // }) } @@ -466,6 +602,9 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { IO (Decode16, 0x60, 0x60, 0x00, 0x01) IO (Decode16, 0x64, 0x64, 0x00, 0x01) IRQNoFlags () {1} + // + // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13, 1 + // }) } @@ -477,6 +616,10 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { Name (_CID, EISAID ("PNP0F13")) Name (_CRS, ResourceTemplate() { IRQNoFlags () {12} + // + // list of IRQs occupied thus far: + // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12 + // }) } @@ -490,6 +633,10 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { Name(_CRS,ResourceTemplate() { IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08) IRQ (Edge, ActiveHigh, Exclusive, ) {4} + // + // list of IRQs occupied thus far: + // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4 + // }) } @@ -503,6 +650,10 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { Name(_CRS,ResourceTemplate() { IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08) IRQ (Edge, ActiveHigh, Exclusive, ) {3} + // + // list of IRQs occupied thus far: + // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3 + // }) } @@ -515,11 +666,33 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) { IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06) IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01) IRQNoFlags () {6} + // + // list of IRQs occupied thus far: + // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6 + // DMA (Compatibility, NotBusMaster, Transfer8) {2} }) } + + // + // parallel port -- no DMA for now + // + Device (PAR1) { + Name (_HID, EISAID ("PNP0400")) + Name (_DDN, "LPT1") + Name (_UID, 0x01) + Name(_CRS, ResourceTemplate() { + IO (Decode16, 0x0378, 0x0378, 0x00, 0x08) + IRQNoFlags () {7} + // + // list of IRQs occupied thus far: + // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6, 7 + // in order: + // 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13 + // + }) + } } } } } -