X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=OvmfPkg%2FAcpiTables%2FPlatform.h;h=d96b847239668fc1131d6b1e8991606b1525eaec;hb=0a781bdc7f87f87b8c3ef57c2837f116daa8b580;hp=b9a491cd788b0f3c5b1b73225606cda1b6c651e6;hpb=2712ab4f5440efd4d340e7bbc0722be75a0f464b;p=mirror_edk2.git

diff --git a/OvmfPkg/AcpiTables/Platform.h b/OvmfPkg/AcpiTables/Platform.h
index b9a491cd78..d96b847239 100644
--- a/OvmfPkg/AcpiTables/Platform.h
+++ b/OvmfPkg/AcpiTables/Platform.h
@@ -1,6 +1,7 @@
 /** @file
   Platform specific defines for constructing ACPI tables
 
+  Copyright (c) 2012, 2013, Red Hat, Inc.
   Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials are
   licensed and made available under the terms and conditions of the BSD License
@@ -23,42 +24,51 @@
 //
 #define EFI_ACPI_OEM_ID           'O','V','M','F',' ',' '   // OEMID 6 bytes long
 #define EFI_ACPI_OEM_TABLE_ID     SIGNATURE_64('O','V','M','F','E','D','K','2') // OEM table id 8 bytes long
-#define EFI_ACPI_OEM_REVISION     0x02000820
+#define EFI_ACPI_OEM_REVISION     0x20130221
 #define EFI_ACPI_CREATOR_ID       SIGNATURE_32('O','V','M','F')
-#define EFI_ACPI_CREATOR_REVISION 0x00000097
+#define EFI_ACPI_CREATOR_REVISION 0x00000099
 
-#define INT_MODEL       0x01
 #define SCI_INT_VECTOR  0x0009
-#define SMI_CMD_IO_PORT 0 // If SMM was supported, then this would be 0xB2
-#define ACPI_ENABLE     0
-#define ACPI_DISABLE    0
+#define SMI_CMD_IO_PORT 0xB2
+#define ACPI_ENABLE     0xF1
+#define ACPI_DISABLE    0xF0
 #define S4BIOS_REQ      0x00
 #define PM1a_EVT_BLK    0x0000b000
-#define PM1b_EVT_BLK    0x00000000
 #define PM1a_CNT_BLK    0x0000b004
-#define PM1b_CNT_BLK    0x00000000
-#define PM2_CNT_BLK     0x00000022
 #define PM_TMR_BLK      0x0000b008
 #define GPE0_BLK        0x0000afe0
-#define GPE1_BLK        0x00000000
 #define PM1_EVT_LEN     0x04
 #define PM1_CNT_LEN     0x02
-#define PM2_CNT_LEN     0x01
 #define PM_TM_LEN       0x04
 #define GPE0_BLK_LEN    0x04
-#define GPE1_BLK_LEN    0x00
-#define GPE1_BASE       0x00
 #define RESERVED        0x00
 #define P_LVL2_LAT      0x0065
 #define P_LVL3_LAT      0x03E9
-#define FLUSH_SIZE      0x0400
-#define FLUSH_STRIDE    0x0010
+#define FLUSH_SIZE      0x0000
+#define FLUSH_STRIDE    0x0000
 #define DUTY_OFFSET     0x00
 #define DUTY_WIDTH      0x00
-#define DAY_ALRM        0x0D
+#define DAY_ALRM        0x00
 #define MON_ALRM        0x00
 #define CENTURY         0x00
-#define FLAG            EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | EFI_ACPI_1_0_SLP_BUTTON | EFI_ACPI_1_0_RTC_S4 | EFI_ACPI_1_0_TMR_VAL_EXT
+#define FLAG            (EFI_ACPI_2_0_WBINVD | \
+                         EFI_ACPI_2_0_PROC_C1 | \
+                         EFI_ACPI_2_0_SLP_BUTTON | \
+                         EFI_ACPI_2_0_RTC_S4 | \
+                         EFI_ACPI_2_0_RESET_REG_SUP)
+#define RESET_REG       0xCF9
+#define RESET_VALUE     (BIT2 | BIT1) // PIIX3 Reset CPU + System Reset
 
-#endif
+//
+// Byte-aligned IO port register block initializer for
+// EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE
+//
+#define GAS2_IO(Base, Size) {                             \
+          EFI_ACPI_2_0_SYSTEM_IO, /* AddressSpaceId    */ \
+          (Size) * 8,             /* RegisterBitWidth  */ \
+          0,                      /* RegisterBitOffset */ \
+          0,                      /* Reserved          */ \
+          (Base)                  /* Address           */ \
+          }
 
+#endif