X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=OvmfPkg%2FPlatformPei%2FPlatform.c;h=d4df0c60e7895fc92889bdaedc75b88641389d48;hb=c191a58fac8901952b44c31856c9f25e390b09b5;hp=aa64aa381c0286353f42fdd541ab44efa56e6f8e;hpb=9ed65b1005034bc4c051af5e237fa4e637570afc;p=mirror_edk2.git

diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index aa64aa381c..d4df0c60e7 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -1,7 +1,9 @@
 /**@file
   Platform PEI driver
 
-  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
+
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -31,6 +33,7 @@
 #include <Library/ResourcePublicationLib.h>
 #include <Guid/MemoryTypeInformation.h>
 #include <Ppi/MasterBootMode.h>
+#include <IndustryStandard/Pci22.h>
 
 #include "Platform.h"
 #include "Cmos.h"
@@ -73,6 +76,22 @@ AddIoMemoryBaseSizeHob (
     );
 }
 
+VOID
+AddReservedMemoryBaseSizeHob (
+  EFI_PHYSICAL_ADDRESS        MemoryBase,
+  UINT64                      MemorySize
+  )
+{
+  BuildResourceDescriptorHob (
+    EFI_RESOURCE_MEMORY_RESERVED,
+      EFI_RESOURCE_ATTRIBUTE_PRESENT     |
+      EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+      EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
+      EFI_RESOURCE_ATTRIBUTE_TESTED,
+    MemoryBase,
+    MemorySize
+    );
+}
 
 VOID
 AddIoMemoryRangeHob (
@@ -144,10 +163,9 @@ AddUntestedMemoryRangeHob (
   AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
 }
 
-
 VOID
-MemMapInitialization (
-  EFI_PHYSICAL_ADDRESS  TopOfMemory
+XenMemMapInitialization (
+  VOID
   )
 {
   //
@@ -164,40 +182,72 @@ MemMapInitialization (
   //
   BuildResourceDescriptorHob (
     EFI_RESOURCE_IO,
-      EFI_RESOURCE_ATTRIBUTE_PRESENT     |
-      EFI_RESOURCE_ATTRIBUTE_INITIALIZED,
-    0x1000,
-    0xF000
+    EFI_RESOURCE_ATTRIBUTE_PRESENT     |
+    EFI_RESOURCE_ATTRIBUTE_INITIALIZED,
+    0xC000,
+    0x4000
     );
 
   //
-  // Add PCI MMIO space available to PCI resource allocations
+  // Video memory + Legacy BIOS region
   //
-  if (TopOfMemory < BASE_2GB) {
-    AddIoMemoryBaseSizeHob (BASE_2GB, 0xFEC00000 - BASE_2GB);
-  } else {
-    AddIoMemoryBaseSizeHob (TopOfMemory, 0xFEC00000 - TopOfMemory);
-  }
+  AddIoMemoryRangeHob (0x0A0000, BASE_1MB);
 
+  XenPublishRamRegions ();
+}
+
+
+VOID
+MemMapInitialization (
+  EFI_PHYSICAL_ADDRESS  TopOfMemory
+  )
+{
   //
-  // Local APIC range
+  // Create Memory Type Information HOB
   //
-  AddIoMemoryBaseSizeHob (0xFEC80000, SIZE_512KB);
+  BuildGuidDataHob (
+    &gEfiMemoryTypeInformationGuid,
+    mDefaultMemoryTypeInformation,
+    sizeof(mDefaultMemoryTypeInformation)
+    );
 
   //
-  // I/O APIC range
+  // Add PCI IO Port space available for PCI resource allocations.
   //
-  AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_512KB);
+  BuildResourceDescriptorHob (
+    EFI_RESOURCE_IO,
+    EFI_RESOURCE_ATTRIBUTE_PRESENT     |
+    EFI_RESOURCE_ATTRIBUTE_INITIALIZED,
+    0xC000,
+    0x4000
+    );
 
   //
   // Video memory + Legacy BIOS region
   //
   AddIoMemoryRangeHob (0x0A0000, BASE_1MB);
+
+  //
+  // address       purpose   size
+  // ------------  --------  -------------------------
+  // max(top, 2g)  PCI MMIO  0xFC000000 - max(top, 2g)
+  // 0xFC000000    gap                           44 MB
+  // 0xFEC00000    IO-APIC                        4 KB
+  // 0xFEC01000    gap                         1020 KB
+  // 0xFED00000    HPET                           1 KB
+  // 0xFED00400    gap                         1023 KB
+  // 0xFEE00000    LAPIC                          1 MB
+  //
+  AddIoMemoryRangeHob (TopOfMemory < BASE_2GB ? BASE_2GB : TopOfMemory, 0xFC000000);
+  AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB);
+  AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB);
+  AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);
 }
 
 
 VOID
 MiscInitialization (
+  VOID
   )
 {
   //
@@ -211,9 +261,34 @@ MiscInitialization (
   BuildCpuHob (36, 16);
 
   //
-  // Set the PM I/O base address to 0x400
+  // If PMREGMISC/PMIOSE is set, assume the ACPI PMBA has been configured (for
+  // example by Xen) and skip the setup here. This matches the logic in
+  // AcpiTimerLibConstructor ().
   //
-  PciAndThenOr32 (PCI_LIB_ADDRESS (0, 1, 3, 0x40), (UINT32) ~0xfc0, 0x400);
+  if ((PciRead8 (PCI_LIB_ADDRESS (0, 1, 3, 0x80)) & 0x01) == 0) {
+    //
+    // The PEI phase should be exited with fully accessibe PIIX4 IO space:
+    // 1. set PMBA
+    //
+    PciAndThenOr32 (
+      PCI_LIB_ADDRESS (0, 1, 3, 0x40),
+      (UINT32) ~0xFFC0,
+      PcdGet16 (PcdAcpiPmBaseAddress)
+      );
+
+    //
+    // 2. set PCICMD/IOSE
+    //
+    PciOr8 (
+      PCI_LIB_ADDRESS (0, 1, 3, PCI_COMMAND_OFFSET),
+      EFI_PCI_COMMAND_IO_SPACE
+      );
+
+    //
+    // 3. set PMREGMISC/PMIOSE
+    //
+    PciOr8 (PCI_LIB_ADDRESS (0, 1, 3, 0x80), 0x01);
+  }
 }
 
 
@@ -221,8 +296,13 @@ VOID
 BootModeInitialization (
   )
 {
-  ASSERT_EFI_ERROR (PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION));
-  ASSERT_EFI_ERROR (PeiServicesInstallPpi (mPpiBootMode));
+  EFI_STATUS Status;
+
+  Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
+  ASSERT_EFI_ERROR (Status);
+
+  Status = PeiServicesInstallPpi (mPpiBootMode);
+  ASSERT_EFI_ERROR (Status);
 }
 
 
@@ -240,8 +320,9 @@ ReserveEmuVariableNvStore (
   //
   VariableStore =
     (EFI_PHYSICAL_ADDRESS)(UINTN)
-      AllocateRuntimePool (
-        2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)
+      AllocateAlignedRuntimePages (
+        EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)),
+        PcdGet32 (PcdFlashNvStorageFtwSpareSize)
         );
   DEBUG ((EFI_D_INFO,
           "Reserved variable store memory: 0x%lX; size: %dkb\n",
@@ -291,21 +372,38 @@ InitializePlatform (
 {
   EFI_PHYSICAL_ADDRESS  TopOfMemory;
 
+  TopOfMemory = 0;
+
   DEBUG ((EFI_D_ERROR, "Platform PEIM Loaded\n"));
 
   DebugDumpCmos ();
 
-  TopOfMemory = MemDetect ();
+  XenDetect ();
+
+  BootModeInitialization ();
+
+  PublishPeiMemory ();
+
+  if (!mXen) {
+    TopOfMemory = MemDetect ();
+  }
+
+  if (mXen) {
+    DEBUG ((EFI_D_INFO, "Xen was detected\n"));
+    InitializeXen ();
+  }
 
   ReserveEmuVariableNvStore ();
 
   PeiFvInitialization ();
 
-  MemMapInitialization (TopOfMemory);
+  if (mXen) {
+    XenMemMapInitialization ();
+  } else {
+    MemMapInitialization (TopOfMemory);
+  }
 
   MiscInitialization ();
 
-  BootModeInitialization ();
-
   return EFI_SUCCESS;
 }