X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=UefiCpuPkg%2FCpuDxe%2FCpuDxe.c;h=99fdbd7757055c34c3d0172c6321f3cad3a1d6c7;hb=0677cc4925d580f7016ac092dc591be0ebe03495;hp=424bc312ea6b96e403f78573796e7c2d3821dbe2;hpb=6640eb366c5cc3df1d1c174ad95d9d1ec3f768cc;p=mirror_edk2.git

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index 424bc312ea..99fdbd7757 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -1,8 +1,8 @@
 /** @file
   CPU DXE Module.
 
-  Copyright (c) 2008 - 2010, Intel Corporation
-  All rights reserved. This program and the accompanying materials
+  Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
+  This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
   http://opensource.org/licenses/bsd-license.php
@@ -111,6 +111,23 @@ EFI_CPU_ARCH_PROTOCOL  gCpu = {
 //
 UINT32 mErrorCodeFlag = 0x00027d00;
 
+//
+// Local function prototypes
+//
+
+/**
+  Set Interrupt Descriptor Table Handler Address.
+
+  @param Index        The Index of the interrupt descriptor table handle.
+  @param Handler      Handler address.
+
+**/
+VOID
+SetInterruptDescriptorTableHandlerAddress (
+  IN UINTN Index,
+  IN VOID  *Handler  OPTIONAL
+  );
+
 //
 // CPU Arch Protocol Functions
 //
@@ -136,7 +153,7 @@ CommonExceptionHandler (
     "!!!! IA32 Exception Type - %08x !!!!\n",
     InterruptType
     ));
-  if (mErrorCodeFlag & (1 << InterruptType)) {
+  if ((mErrorCodeFlag & (1 << InterruptType)) != 0) {
     DEBUG ((
       EFI_D_ERROR,
       "ExceptionData - %08x\n",
@@ -217,7 +234,7 @@ CommonExceptionHandler (
     "!!!! X64 Exception Type - %016lx !!!!\n",
     (UINT64)InterruptType
     ));
-  if (mErrorCodeFlag & (1 << InterruptType)) {
+  if ((mErrorCodeFlag & (1 << InterruptType)) != 0) {
     DEBUG ((
       EFI_D_ERROR,
       "ExceptionData - %016lx\n",
@@ -504,6 +521,7 @@ CpuRegisterInterruptHandler (
     return EFI_ALREADY_STARTED;
   }
 
+  SetInterruptDescriptorTableHandlerAddress ((UINTN)InterruptType, NULL);
   ExternalVectorTable[InterruptType] = InterruptHandler;
   return EFI_SUCCESS;
 }
@@ -590,7 +608,9 @@ CpuSetMemoryAttributes (
   RETURN_STATUS             Status;
   MTRR_MEMORY_CACHE_TYPE    CacheType;
 
-  DEBUG((EFI_D_ERROR, "CpuAp: SetMemorySpaceAttributes(BA=%08x, Len=%08x, Attr=%08x)\n", BaseAddress, Length, Attributes));
+  if (!IsMtrrSupported ()) {
+    return EFI_UNSUPPORTED;
+  }
 
   //
   // If this function is called because GCD SetMemorySpaceAttributes () is called
@@ -630,15 +650,12 @@ CpuSetMemoryAttributes (
   //
   // call MTRR libary function
   //
-  DEBUG((EFI_D_ERROR, "  MtrrSetMemoryAttribute()\n"));
-  Status = MtrrSetMemoryAttribute(
+  Status = MtrrSetMemoryAttribute (
              BaseAddress,
              Length,
              CacheType
              );
 
-  MtrrDebugPrintAllMtrrs ();
-
   return (EFI_STATUS) Status;
 }
 
@@ -672,11 +689,11 @@ InitializeMtrrMask (
 }
 
 /**
-  Gets GCD Mem Space type from MTRR Type
+  Gets GCD Mem Space type from MTRR Type.
 
-  This function gets GCD Mem Space type from MTRR Type
+  This function gets GCD Mem Space type from MTRR Type.
 
-  @param  MtrrAttribute  MTRR memory type
+  @param  MtrrAttributes  MTRR memory type
 
   @return GCD Mem Space type
 
@@ -856,7 +873,12 @@ RefreshGcdMemoryAttributes (
   MTRR_FIXED_SETTINGS                 MtrrFixedSettings;
   UINT32                              FirmwareVariableMtrrCount;
 
+  if (!IsMtrrSupported ()) {
+    return;
+  }
+
   FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
+  ASSERT (FirmwareVariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
 
 //  mIsFlushingGCD = TRUE;
   mIsFlushingGCD = FALSE;
@@ -995,40 +1017,98 @@ RefreshGcdMemoryAttributes (
   mIsFlushingGCD = FALSE;
 }
 
+/**
+  Set Interrupt Descriptor Table Handler Address.
+
+  @param Index        The Index of the interrupt descriptor table handle.
+  @param Handler      Handler address.
+
+**/
+VOID
+SetInterruptDescriptorTableHandlerAddress (
+  IN UINTN Index,
+  IN VOID  *Handler  OPTIONAL
+  )
+{
+  UINTN                     UintnHandler;
+
+  if (Handler != NULL) {
+    UintnHandler = (UINTN) Handler;
+  } else {
+    UintnHandler = ((UINTN) AsmIdtVector00) + (8 * Index);
+  }
+
+  gIdtTable[Index].Bits.OffsetLow   = (UINT16)UintnHandler;
+  gIdtTable[Index].Bits.Reserved_0  = 0;
+  gIdtTable[Index].Bits.GateType    = IA32_IDT_GATE_TYPE_INTERRUPT_32;
+  gIdtTable[Index].Bits.OffsetHigh  = (UINT16)(UintnHandler >> 16);
+#if defined (MDE_CPU_X64)
+  gIdtTable[Index].Bits.OffsetUpper = (UINT32)(UintnHandler >> 32);
+  gIdtTable[Index].Bits.Reserved_1  = 0;
+#endif
+}
+
 
 /**
   Initialize Interrupt Descriptor Table for interrupt handling.
 
 **/
-STATIC
 VOID
 InitInterruptDescriptorTable (
   VOID
   )
 {
-  EFI_STATUS      Status;
-  VOID            *IdtPtrAlignmentBuffer;
-  IA32_DESCRIPTOR *IdtPtr;
-  UINTN           Index;
-  UINTN           CurrentHandler;
-  BOOLEAN         InterruptState;
+  EFI_STATUS                Status;
+  IA32_DESCRIPTOR           OldIdtPtr;
+  IA32_IDT_GATE_DESCRIPTOR  *OldIdt;
+  UINTN                     OldIdtSize;
+  VOID                      *IdtPtrAlignmentBuffer;
+  IA32_DESCRIPTOR           *IdtPtr;
+  UINTN                     Index;
+  UINT16                    CurrentCs;
+  VOID                      *IntHandler;
 
   SetMem (ExternalVectorTable, sizeof(ExternalVectorTable), 0);
 
+  //
+  // Get original IDT address and size.
+  //
+  AsmReadIdtr ((IA32_DESCRIPTOR *) &OldIdtPtr);
+
+  if ((OldIdtPtr.Base != 0) && ((OldIdtPtr.Limit & 7) == 7)) {
+    OldIdt = (IA32_IDT_GATE_DESCRIPTOR*) OldIdtPtr.Base;
+    OldIdtSize = (OldIdtPtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);
+  } else {
+    OldIdt = NULL;
+    OldIdtSize = 0;
+  }
+
   //
   // Intialize IDT
   //
-  CurrentHandler = (UINTN)AsmIdtVector00;
-  for (Index = 0; Index < INTERRUPT_VECTOR_NUMBER; Index ++, CurrentHandler += 0x08) {
-    gIdtTable[Index].Bits.OffsetLow   = (UINT16)CurrentHandler;
-    gIdtTable[Index].Bits.Selector    = AsmReadCs();
-    gIdtTable[Index].Bits.Reserved_0  = 0;
-    gIdtTable[Index].Bits.GateType    = IA32_IDT_GATE_TYPE_INTERRUPT_32;
-    gIdtTable[Index].Bits.OffsetHigh  = (UINT16)(CurrentHandler >> 16);
+  CurrentCs = AsmReadCs();
+  for (Index = 0; Index < INTERRUPT_VECTOR_NUMBER; Index ++) {
+    //
+    // If the old IDT had a handler for this interrupt, then
+    // preserve it.
+    //
+    if (Index < OldIdtSize) {
+      IntHandler = 
+        (VOID*) (
+          OldIdt[Index].Bits.OffsetLow +
+          (OldIdt[Index].Bits.OffsetHigh << 16)
 #if defined (MDE_CPU_X64)
-    gIdtTable[Index].Bits.OffsetUpper = (UINT32)(CurrentHandler >> 32);
-    gIdtTable[Index].Bits.Reserved_1  = 0;
+            + (((UINTN) OldIdt[Index].Bits.OffsetUpper) << 32)
 #endif
+          );
+    } else {
+      IntHandler = NULL;
+    }
+
+    gIdtTable[Index].Bits.Selector    = CurrentCs;
+    gIdtTable[Index].Bits.Reserved_0  = 0;
+    gIdtTable[Index].Bits.GateType    = IA32_IDT_GATE_TYPE_INTERRUPT_32;
+    SetInterruptDescriptorTableHandlerAddress (Index, IntHandler);
   }
 
   //
@@ -1037,20 +1117,10 @@ InitInterruptDescriptorTable (
   IdtPtrAlignmentBuffer = AllocatePool (sizeof (*IdtPtr) + 16);
   IdtPtr = ALIGN_POINTER (IdtPtrAlignmentBuffer, 16);
   IdtPtr->Base = (UINT32)(((UINTN)(VOID*) gIdtTable) & (BASE_4GB-1));
-  IdtPtr->Limit = sizeof (gIdtTable) - 1;
-
-  //
-  // Disable interrupts and save the current interrupt state
-  //
-  InterruptState = SaveAndDisableInterrupts ();
+  IdtPtr->Limit = (UINT16) (sizeof (gIdtTable) - 1);
 
   AsmWriteIdtr (IdtPtr);
 
-  //
-  // Restore the interrupt state
-  //
-  SetInterruptState (InterruptState);
-
   FreePool (IdtPtrAlignmentBuffer);
 
   //