X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=UefiCpuPkg%2FUefiCpuPkg.dec;h=69d777aa6535d4d80f2bba3b6d541de5befc533b;hb=58cf30f71f03bcf2fbf369d51e05c8f17176e129;hp=8674533d0b55559c06e2614db6214805ac40796e;hpb=87896d03f6f71e7d7f31b7b56f3d4bc9340bb899;p=mirror_edk2.git
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 8674533d0b..69d777aa65 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -1,7 +1,7 @@
## @file UefiCpuPkg.dec
# This Package provides UEFI compatible CPU modules and libraries.
#
-# Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License which accompanies this distribution.
@@ -18,7 +18,7 @@
PACKAGE_NAME = UefiCpuPkg
PACKAGE_UNI_FILE = UefiCpuPkg.uni
PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23
- PACKAGE_VERSION = 0.3
+ PACKAGE_VERSION = 0.90
[Includes]
Include
@@ -29,6 +29,11 @@
##
UefiCpuLib|Include/Library/UefiCpuLib.h
+ ## @libraryclass Defines some routines that are used to register/manage/program
+ ## CPU features.
+ ##
+ RegisterCpuFeaturesLib|Include/Library/RegisterCpuFeaturesLib.h
+
[LibraryClasses.IA32, LibraryClasses.X64]
## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs.
##
@@ -56,11 +61,21 @@
[Guids]
gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
+ gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
+
+ ## Include/Guid/CpuFeaturesSetDone.h
+ gEdkiiCpuFeaturesSetDoneGuid = { 0xa82485ce, 0xad6b, 0x4101, { 0x99, 0xd3, 0xe1, 0x35, 0x8c, 0x9e, 0x7e, 0x37 }}
+
+ ## Include/Guid/CpuFeaturesInitDone.h
+ gEdkiiCpuFeaturesInitDoneGuid = { 0xc77c3a41, 0x61ab, 0x4143, { 0x98, 0x3e, 0x33, 0x39, 0x28, 0x6, 0x28, 0xe5 }}
[Protocols]
## Include/Protocol/SmmCpuService.h
gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
+ ## Include/Protocol/SmMonitorInit.h
+ gEfiSmMonitorInitProtocolGuid = { 0x228f344d, 0xb3de, 0x43bb, { 0xa4, 0xd7, 0xea, 0x20, 0xb, 0x1b, 0x14, 0x82 }}
+
#
# [Error.gUefiCpuPkgTokenSpaceGuid]
# 0x80000001 | Invalid value provided.
@@ -69,6 +84,7 @@
[PcdsFeatureFlag]
## Indicates if SMM Profile will be enabled.
# If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.
+ # It could not be enabled at the same time with SMM static page table feature (PcdCpuSmmStaticPageTable).
# This PCD is only for validation purpose. It should be set to false in production.
# TRUE - SMM Profile will be enabled.
# FALSE - SMM Profile will be disabled.
@@ -122,6 +138,18 @@
# @Prompt Lock SMM Feature Control MSR.
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
+[PcdsFixedAtBuild]
+ ## List of exception vectors which need switching stack.
+ # This PCD will only take into effect if PcdCpuStackGuard is enabled.
+ # By default exception #DD(8), #PF(14) are supported.
+ # @Prompt Specify exception vectors which need switching stack.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList|{0x08, 0x0E}|VOID*|0x30002000
+
+ ## Size of good stack for an exception.
+ # This PCD will only take into effect if PcdCpuStackGuard is enabled.
+ # @Prompt Specify size of good stack of exception which need switching stack.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize|2048|UINT32|0x30002001
+
[PcdsFixedAtBuild, PcdsPatchableInModule]
## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.
# @Prompt Configure base address of CPU Local APIC
@@ -149,10 +177,6 @@
# @Prompt Processor stack size in SMM.
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105
- ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.
- # @Prompt AP synchronization timeout value in SMM.
- gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104
-
## Indicates if SMM Code Access Check is enabled.
# If enabled, the SMM handler cannot execute the code outside SMM regions.
# This PCD is suggested to TRUE in production image.
@@ -161,17 +185,31 @@
# @Prompt SMM Code Access Check.
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013
- ## Indicates the CPU synchronization method used when processing an SMI.
- # 0x00 - Traditional CPU synchronization method.
- # 0x01 - Relaxed CPU synchronization method.
- # @Prompt SMM CPU Synchronization Method.
- gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014
-
## Specifies the number of variable MTRRs reserved for OS use. The default number of
# MTRRs reserved for OS use is 2.
# @Prompt Number of reserved variable MTRRs.
gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x2|UINT32|0x00000015
+ ## Specifies buffer size in bytes for STM exception stack. The value should be a multiple of 4KB.
+ # @Prompt STM exception stack size.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize|0x1000|UINT32|0x32132111
+
+ ## Specifies buffer size in bytes of MSEG. The value should be a multiple of 4KB.
+ # @Prompt MSEG size.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize|0x200000|UINT32|0x32132112
+
+ ## Specifies the supported CPU features bit in array.
+ # @Prompt Supported CPU features.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport|{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}|VOID*|0x00000016
+
+ ## Specifies if CPU features will be initialized after SMM relocation.
+ # @Prompt If CPU features will be initialized after SMM relocation.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitAfterSmmRelocation|FALSE|BOOLEAN|0x0000001C
+
+ ## Specifies if CPU features will be initialized during S3 resume.
+ # @Prompt If CPU features will be initialized during S3 resume.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume|FALSE|BOOLEAN|0x0000001D
+
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
## Specifies max supported number of Logical Processors.
# @Prompt Configure max supported number of Logical Processors
@@ -199,6 +237,42 @@
# @Prompt The specified AP target C-state for Mwait.
gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007
+ ## Indicates if SMM uses static page table.
+ # If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.
+ # This flag only impacts X64 build, because SMM always builds static page table for IA32.
+ # It could not be enabled at the same time with SMM profile feature (PcdCpuSmmProfileEnable).
+ # It could not be enabled also at the same time with heap guard feature for SMM
+ # (PcdHeapGuardPropertyMask in MdeModulePkg).
+ # TRUE - SMM uses static page table for all memory.
+ # FALSE - SMM uses static page table for below 4G memory and use on-demand paging for above 4G memory.
+ # @Prompt Use static page table for all memory in SMM.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStaticPageTable|TRUE|BOOLEAN|0x3213210D
+
+ ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.
+ # @Prompt AP synchronization timeout value in SMM.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104
+
+ ## Indicates the CPU synchronization method used when processing an SMI.
+ # 0x00 - Traditional CPU synchronization method.
+ # 0x01 - Relaxed CPU synchronization method.
+ # @Prompt SMM CPU Synchronization Method.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014
+
+ ## Specifies user's desired settings for enabling/disabling processor features.
+ # @Prompt User settings for enabling/disabling processor features.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesUserConfiguration|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000017
+
+ ## Specifies the On-demand clock modulation duty cycle when ACPI feature is enabled.
+ # @Prompt The encoded values for target duty cycle modulation.
+ # @ValidRange 0x80000001 | 0 - 15
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle|0x0|UINT8|0x0000001A
+
+ ## Indicates if the current boot is a power-on reset.
+ # TRUE - Current boot is a power-on reset.
+ # FALSE - Current boot is not a power-on reset.
+ # @Prompt Current boot is a power-on reset.
+ gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset|FALSE|BOOLEAN|0x0000001B
+
[PcdsDynamic, PcdsDynamicEx]
## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
# @Prompt The pointer to a CPU S3 data buffer.
@@ -210,5 +284,49 @@
# @ValidList 0x80000001 | 0
gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011
+ ## Indicates processor feature capabilities, each bit corresponding to a specific feature.
+ # @Prompt Processor feature capabilities.
+ # @ValidList 0x80000001 | 0
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000018
+
+ ## Specifies actual settings for processor features, each bit corresponding to a specific feature.
+ # @Prompt Actual processor feature settings.
+ # @ValidList 0x80000001 | 0
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000019
+
+ ## Contains the size of memory required when CPU processor trace is enabled.
+ # Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.
+ # This PCD is ignored if CPU processor trace is disabled.
+ # Default value is 0x00 which means 4KB of memory is allocated if CPU processor trace is enabled.
+ # 0x0 - 4K.
+ # 0x1 - 8K.
+ # 0x2 - 16K.
+ # 0x3 - 32K.
+ # 0x4 - 64K.
+ # 0x5 - 128K.
+ # 0x6 - 256K.
+ # 0x7 - 512K.
+ # 0x8 - 1M.
+ # 0x9 - 2M.
+ # 0xA - 4M.
+ # 0xB - 8M.
+ # 0xC - 16M.
+ # 0xD - 32M.
+ # 0xE - 64M.
+ # 0xF - 128M.
+ # @Prompt The memory size used for processor trace if processor trace is enabled.
+ # @ValidRange 0x80000001 | 0 - 0xF
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize|0x0|UINT32|0x60000012
+
+ ## Contains the processor trace output scheme when CPU processor trace is enabled.
+ # Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.
+ # This PCD is ignored if CPU processor trace is disabled.
+ # Default value is 0 which means single range output scheme will be used if CPU processor trace is enabled.
+ # 0 - Single Range output scheme.
+ # 1 - ToPA(Table of physical address) scheme.
+ # @Prompt The processor trace output scheme used when processor trace is enabled.
+ # @ValidRange 0x80000001 | 0 - 1
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme|0x0|UINT8|0x60000015
+
[UserExtensions.TianoCore."ExtraFiles"]
UefiCpuPkgExtra.uni