X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=UefiCpuPkg%2FUefiCpuPkg.dec;h=69d777aa6535d4d80f2bba3b6d541de5befc533b;hb=7de0083812245ec2d0b35667ef4a1aa262e006e0;hp=b4e099d43ec63353da6227cfb252c8be1be57b66;hpb=234d4c5fe6cc5856faf517ee404ac703d94d6702;p=mirror_edk2.git
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index b4e099d43e..69d777aa65 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -18,7 +18,7 @@
PACKAGE_NAME = UefiCpuPkg
PACKAGE_UNI_FILE = UefiCpuPkg.uni
PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23
- PACKAGE_VERSION = 0.80
+ PACKAGE_VERSION = 0.90
[Includes]
Include
@@ -59,17 +59,10 @@
##
MpInitLib|Include/Library/MpInitLib.h
- ## @libraryclass Provides services to access Microcode region on flash device.
- #
- MicrocodeFlashAccessLib|Include/Library/MicrocodeFlashAccessLib.h
-
[Guids]
gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
- ## Include/Guid/MicrocodeFmp.h
- gMicrocodeFmpImageTypeIdGuid = { 0x96d4fdcd, 0x1502, 0x424d, { 0x9d, 0x4c, 0x9b, 0x12, 0xd2, 0xdc, 0xae, 0x5c } }
-
## Include/Guid/CpuFeaturesSetDone.h
gEdkiiCpuFeaturesSetDoneGuid = { 0xa82485ce, 0xad6b, 0x4101, { 0x99, 0xd3, 0xe1, 0x35, 0x8c, 0x9e, 0x7e, 0x37 }}
@@ -91,6 +84,7 @@
[PcdsFeatureFlag]
## Indicates if SMM Profile will be enabled.
# If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.
+ # It could not be enabled at the same time with SMM static page table feature (PcdCpuSmmStaticPageTable).
# This PCD is only for validation purpose. It should be set to false in production.
# TRUE - SMM Profile will be enabled.
# FALSE - SMM Profile will be disabled.
@@ -144,6 +138,18 @@
# @Prompt Lock SMM Feature Control MSR.
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
+[PcdsFixedAtBuild]
+ ## List of exception vectors which need switching stack.
+ # This PCD will only take into effect if PcdCpuStackGuard is enabled.
+ # By default exception #DD(8), #PF(14) are supported.
+ # @Prompt Specify exception vectors which need switching stack.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList|{0x08, 0x0E}|VOID*|0x30002000
+
+ ## Size of good stack for an exception.
+ # This PCD will only take into effect if PcdCpuStackGuard is enabled.
+ # @Prompt Specify size of good stack of exception which need switching stack.
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize|2048|UINT32|0x30002001
+
[PcdsFixedAtBuild, PcdsPatchableInModule]
## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.
# @Prompt Configure base address of CPU Local APIC
@@ -232,8 +238,11 @@
gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007
## Indicates if SMM uses static page table.
- # If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.
- # This flag only impacts X64 build, because SMM alway builds static page table for IA32.
+ # If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.
+ # This flag only impacts X64 build, because SMM always builds static page table for IA32.
+ # It could not be enabled at the same time with SMM profile feature (PcdCpuSmmProfileEnable).
+ # It could not be enabled also at the same time with heap guard feature for SMM
+ # (PcdHeapGuardPropertyMask in MdeModulePkg).
# TRUE - SMM uses static page table for all memory.
# FALSE - SMM uses static page table for below 4G memory and use on-demand paging for above 4G memory.
# @Prompt Use static page table for all memory in SMM.
@@ -286,7 +295,9 @@
gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000019
## Contains the size of memory required when CPU processor trace is enabled.
- # Default value is 0x10 which disables the processor trace.
+ # Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.
+ # This PCD is ignored if CPU processor trace is disabled.
+ # Default value is 0x00 which means 4KB of memory is allocated if CPU processor trace is enabled.
# 0x0 - 4K.
# 0x1 - 8K.
# 0x2 - 16K.
@@ -303,19 +314,19 @@
# 0xD - 32M.
# 0xE - 64M.
# 0xF - 128M.
- # 0x10 - ProcTraceMemDisable.
- # @Prompt The memory size used for processor trace.
- # @ValidRange 0x80000001 | 0 - 0x10
- gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize|0x10|UINT32|0x60000012
+ # @Prompt The memory size used for processor trace if processor trace is enabled.
+ # @ValidRange 0x80000001 | 0 - 0xF
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize|0x0|UINT32|0x60000012
## Contains the processor trace output scheme when CPU processor trace is enabled.
- # Default value is 2 which disables the processor trace.
+ # Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.
+ # This PCD is ignored if CPU processor trace is disabled.
+ # Default value is 0 which means single range output scheme will be used if CPU processor trace is enabled.
# 0 - Single Range output scheme.
# 1 - ToPA(Table of physical address) scheme.
- # 2 - Invalid scheme.
- # @Prompt The processor trace output scheme.
- # @ValidRange 0x80000001 | 0 - 2
- gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme|0x2|UINT8|0x60000015
+ # @Prompt The processor trace output scheme used when processor trace is enabled.
+ # @ValidRange 0x80000001 | 0 - 1
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme|0x0|UINT8|0x60000015
[UserExtensions.TianoCore."ExtraFiles"]
UefiCpuPkgExtra.uni