X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=Vlv2TbltDevicePkg%2FPlatformPkgGcc.fdf;h=847286328a9298672227dab241bf68ea8c4d01c1;hb=b649ee19047fc75f843ab60ae453bf4abd7980a4;hp=aa9c383bb9d3812f764be210a586afcffa3a7589;hpb=5e7520843dc1e97a6779174b4bcb3833edd72f05;p=mirror_edk2.git
diff --git a/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf b/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
index aa9c383bb9..847286328a 100644
--- a/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
+++ b/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
@@ -1,7 +1,7 @@
#/** @file
# FDF file of Platform.
#
-# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
@@ -26,35 +26,35 @@ DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
-DEFINE FLASH_REGION_VPD_OFFSET = 0x00130000
+DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
-DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0016E000
+DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
-DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00170000
+DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
!if $(MINNOW2_FSP_BUILD) == TRUE
-DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x001B0000
+DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
-DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
+DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
-DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x001F8000
+DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
-DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
+DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
!endif
-DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00200000
-DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000
+DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
+DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000
-DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00396000
-DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000
+DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000
+DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000
-DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x003C2000
-DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003E000
+DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
+DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
################################################################################
#
@@ -82,6 +82,9 @@ NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH
SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
+
!if $(MINNOW2_FSP_BUILD) == TRUE
# put below PCD value setting into dsc file
#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
@@ -120,7 +123,6 @@ SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_A
$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
FV = MICROCODE_FV
-
$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
@@ -199,6 +201,34 @@ FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
$(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
}
+!if $(RECOVERY_ENABLE)
+[FV.FVRECOVERY_COMPONENTS]
+FvAlignment = 16 #FV alignment and FV attributes setting.
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
+INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
+INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
+INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
+INF FatPkg/FatPei/FatPei.inf
+INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
+INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
+!endif
+
################################################################################
#
# FV Section
@@ -245,14 +275,14 @@ INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET
INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
!endif
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
+# INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
!if $(TPM_ENABLED) == TRUE
-INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
+INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
!endif
!if $(FTPM_ENABLE) == TRUE
-INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config
+INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config
!endif
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
@@ -263,6 +293,15 @@ INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
!endif
+!if $(RECOVERY_ENABLE)
+FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
+ SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
+ SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
+ }
+}
+!endif
+
[FV.FVRECOVERY]
BlockSize = $(FLASH_BLOCK_SIZE)
FvAlignment = 16 #FV alignment and FV attributes setting.
@@ -385,6 +424,7 @@ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
+INF USE=X64 MdeModulePkg/Logo/Logo.inf
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
@@ -468,7 +508,7 @@ INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
-INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf
+INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
!endif
@@ -499,15 +539,19 @@ INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET
#
INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
+INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
+INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
-# INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
+
+#
+# Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell
+#
+#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
+#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
+
#
# ACPI
#
@@ -520,6 +564,8 @@ INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.in
INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
+INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
+
#
# PCI
#
@@ -543,8 +589,8 @@ INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
#
# SDIO
#
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
+#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
+#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
#
# IDE/SCSI/AHCI
#
@@ -619,12 +665,14 @@ INF FatPkg/EnhancedFatDxe/Fat.inf
#
# UEFI Shell
#
-FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
-# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
- SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
- }
-
+INF ShellPkg/Application/Shell/Shell.inf
+#
+# dp command
+#
+!if $(PERFORMANCE_ENABLE) == TRUE
+INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
+!endif
!if $(GOP_DRIVER_ENABLE) == TRUE
FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
@@ -649,6 +697,8 @@ FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
+ INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
+ INF NetworkPkg/TcpDxe/TcpDxe.inf
!if $(NETWORK_IP6_ENABLE) == TRUE
INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
@@ -656,25 +706,42 @@ FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
!endif
- !if $(NETWORK_IP6_ENABLE) == TRUE
- INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
- INF NetworkPkg/TcpDxe/TcpDxe.inf
- !else
- INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
- INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
- !endif
!if $(NETWORK_VLAN_ENABLE) == TRUE
INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
!endif
!if $(NETWORK_ISCSI_ENABLE) == TRUE
- !if $(NETWORK_IP6_ENABLE) == TRUE
INF NetworkPkg/IScsiDxe/IScsiDxe.inf
- !else
- INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
- !endif
!endif
!endif
+!if $(CAPSULE_ENABLE)
+INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
+
+#
+# Minnow Max System Firmware FMP
+#
+INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf
+
+#
+# Sample Device FMP
+#
+INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
+INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
+INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
+
+!endif
+
+!if $(MICOCODE_CAPSULE_ENABLE)
+INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
+!endif
+
+!if $(RECOVERY_ENABLE)
+FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
+ SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
+ SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
+ }
+!endif
+
[FV.FVMAIN_COMPACT]
BlockSize = $(FLASH_BLOCK_SIZE)
FvAlignment = 16
@@ -737,92 +804,6 @@ READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
-
-[FV.Update_Data]
-BlockSize = $(FLASH_BLOCK_SIZE)
-FvAlignment = 16
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
-FILE RAW = 88888888-8888-8888-8888-888888888888 {
- FD = Vlv
- }
-
-[FV.BiosUpdateCargo]
-BlockSize = $(FLASH_BLOCK_SIZE)
-FvAlignment = 16
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
-
-
-[FV.BiosUpdate]
-BlockSize = $(FLASH_BLOCK_SIZE)
-FvAlignment = 16
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
-[Capsule.Capsule_Boot]
-#
-# gEfiCapsuleGuid supported by platform
-# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
-#
-CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
-CAPSULE_FLAGS = PersistAcrossReset
-CAPSULE_HEADER_SIZE = 0x20
-
-FV = BiosUpdate
-
-[Capsule.Capsule_Reset]
-#
-# gEfiCapsuleGuid supported by platform
-# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
-#
-CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
-CAPSULE_FLAGS = PersistAcrossReset
-CAPSULE_HEADER_SIZE = 0x20
-
-FV = BiosUpdate
-
################################################################################
#
# Rules are use with the [FV] section's module INF type to define
@@ -840,7 +821,11 @@ FV = BiosUpdate
[Rule.Common.SEC.BINARY]
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
PE32 PE32 Align = 8 |.efi
- RAW BIN Align = 16 |.com
+!if $(MINNOW2_FSP_BUILD) == TRUE
+ RAW RAW |.raw
+!else
+ RAW BIN Align = 16 |.com
+!endif
}
[Rule.Common.PEI_CORE]
@@ -1030,6 +1015,12 @@ FV = BiosUpdate
RAW BIN |.bin
}
+[Rule.Common.USER_DEFINED.BINARY]
+ FILE FREEFORM = $(NAMED_GUID) {
+ UI STRING="$(MODULE_NAME)" Optional
+ RAW BIN |.bin
+ }
+
[Rule.Common.USER_DEFINED.ACPITABLE]
FILE FREEFORM = $(NAMED_GUID) {
RAW ACPI Optional |.acpi
@@ -1047,3 +1038,11 @@ FV = BiosUpdate
RAW ASL Optional |.aml
}
+[Rule.Common.PEIM.FMP_IMAGE_DESC]
+ FILE PEIM = $(NAMED_GUID) {
+ RAW BIN |.acpi
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }