X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=cpu-all.h;h=e8391009a36e4de3accd1ac2feb0a2ac28cb18de;hb=6e1db57b2ac9025c2443c665a0d9e78748637b26;hp=e8cccc646071c3cf51e6cedb76f767af910e71ec;hpb=6a4955a813467089549f865600284e6be0d018fc;p=qemu.git diff --git a/cpu-all.h b/cpu-all.h index e8cccc646..e8391009a 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -14,24 +14,20 @@ * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA + * License along with this library; if not, see . */ #ifndef CPU_ALL_H #define CPU_ALL_H #include "qemu-common.h" - -#if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__) -#define WORDS_ALIGNED -#endif +#include "cpu-common.h" /* some important defines: * * WORDS_ALIGNED : if defined, the host cpu can only make word aligned * memory accesses. * - * WORDS_BIGENDIAN : if defined, the host cpu is big endian and + * HOST_WORDS_BIGENDIAN : if defined, the host cpu is big endian and * otherwise little endian. * * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet)) @@ -39,10 +35,9 @@ * TARGET_WORDS_BIGENDIAN : same for target cpu */ -#include "bswap.h" #include "softfloat.h" -#if defined(WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN) #define BSWAP_NEEDED #endif @@ -128,8 +123,7 @@ typedef union { endian ! */ typedef union { float64 d; -#if defined(WORDS_BIGENDIAN) \ - || (defined(__arm__) && !defined(__VFP_FP__) && !defined(CONFIG_SOFTFLOAT)) +#if defined(HOST_WORDS_BIGENDIAN) struct { uint32_t upper; uint32_t lower; @@ -143,11 +137,17 @@ typedef union { uint64_t ll; } CPU_DoubleU; -#ifdef TARGET_SPARC +typedef union { + floatx80 d; + struct { + uint64_t lower; + uint16_t upper; + } l; +} CPU_LDoubleU; + typedef union { float128 q; -#if defined(WORDS_BIGENDIAN) \ - || (defined(__arm__) && !defined(__VFP_FP__) && !defined(CONFIG_SOFTFLOAT)) +#if defined(HOST_WORDS_BIGENDIAN) struct { uint32_t upmost; uint32_t upper; @@ -171,7 +171,6 @@ typedef union { } ll; #endif } CPU_QuadU; -#endif /* CPU memory access without any memory or io remapping */ @@ -226,7 +225,7 @@ static inline void stb_p(void *ptr, int v) /* NOTE: on arm, putting 2 in /proc/sys/debug/alignment so that the kernel handles unaligned load/stores may give better results, but it is a system wide setting : bad */ -#if defined(WORDS_BIGENDIAN) || defined(WORDS_ALIGNED) +#if defined(HOST_WORDS_BIGENDIAN) || defined(WORDS_ALIGNED) /* conservative code for little endian unaligned accesses */ static inline int lduw_le_p(const void *ptr) @@ -403,7 +402,7 @@ static inline void stfq_le_p(void *ptr, float64 v) } #endif -#if !defined(WORDS_BIGENDIAN) || defined(WORDS_ALIGNED) +#if !defined(HOST_WORDS_BIGENDIAN) || defined(WORDS_ALIGNED) static inline int lduw_be_p(const void *ptr) { @@ -629,21 +628,35 @@ static inline void stfq_be_p(void *ptr, float64 v) /* On some host systems the guest address space is reserved on the host. * This allows the guest address space to be offset to a convenient location. */ -//#define GUEST_BASE 0x20000000 -#define GUEST_BASE 0 +#if defined(CONFIG_USE_GUEST_BASE) +extern unsigned long guest_base; +extern int have_guest_base; +extern unsigned long reserved_va; +#define GUEST_BASE guest_base +#define RESERVED_VA reserved_va +#else +#define GUEST_BASE 0ul +#define RESERVED_VA 0ul +#endif /* All direct uses of g2h and h2g need to go away for usermode softmmu. */ #define g2h(x) ((void *)((unsigned long)(x) + GUEST_BASE)) + +#if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS +#define h2g_valid(x) 1 +#else +#define h2g_valid(x) ({ \ + unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \ + __guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS); \ +}) +#endif + #define h2g(x) ({ \ unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \ /* Check if given address fits target address space */ \ - assert(__ret == (abi_ulong)__ret); \ + assert(h2g_valid(x)); \ (abi_ulong)__ret; \ }) -#define h2g_valid(x) ({ \ - unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \ - (__guest == (abi_ulong)__guest); \ -}) #define saddr(x) g2h(x) #define laddr(x) g2h(x) @@ -736,46 +749,105 @@ extern unsigned long qemu_host_page_mask; /* original state of the write flag (used when tracking self-modifying code */ #define PAGE_WRITE_ORG 0x0010 +#if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY) +/* FIXME: Code that sets/uses this is broken and needs to go away. */ #define PAGE_RESERVED 0x0020 +#endif +#if defined(CONFIG_USER_ONLY) void page_dump(FILE *f); + +typedef int (*walk_memory_regions_fn)(void *, abi_ulong, + abi_ulong, unsigned long); +int walk_memory_regions(void *, walk_memory_regions_fn); + int page_get_flags(target_ulong address); void page_set_flags(target_ulong start, target_ulong end, int flags); int page_check_range(target_ulong start, target_ulong len, int flags); +#endif -void cpu_exec_init_all(unsigned long tb_size); CPUState *cpu_copy(CPUState *env); +CPUState *qemu_get_cpu(int cpu); -void cpu_dump_state(CPUState *env, FILE *f, - int (*cpu_fprintf)(FILE *f, const char *fmt, ...), +#define CPU_DUMP_CODE 0x00010000 + +void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf, int flags); -void cpu_dump_statistics (CPUState *env, FILE *f, - int (*cpu_fprintf)(FILE *f, const char *fmt, ...), - int flags); +void cpu_dump_statistics(CPUState *env, FILE *f, fprintf_function cpu_fprintf, + int flags); void QEMU_NORETURN cpu_abort(CPUState *env, const char *fmt, ...) - __attribute__ ((__format__ (__printf__, 2, 3))); + GCC_FMT_ATTR(2, 3); extern CPUState *first_cpu; extern CPUState *cpu_single_env; -extern int64_t qemu_icount; -extern int use_icount; - -#define CPU_INTERRUPT_HARD 0x02 /* hardware interrupt pending */ -#define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */ -#define CPU_INTERRUPT_TIMER 0x08 /* internal timer exception pending */ -#define CPU_INTERRUPT_FIQ 0x10 /* Fast interrupt pending. */ -#define CPU_INTERRUPT_HALT 0x20 /* CPU halt wanted */ -#define CPU_INTERRUPT_SMI 0x40 /* (x86 only) SMI interrupt pending */ -#define CPU_INTERRUPT_DEBUG 0x80 /* Debug event occured. */ -#define CPU_INTERRUPT_VIRQ 0x100 /* virtual interrupt pending. */ -#define CPU_INTERRUPT_NMI 0x200 /* NMI pending. */ - -void cpu_interrupt(CPUState *s, int mask); + +/* Flags for use in ENV->INTERRUPT_PENDING. + + The numbers assigned here are non-sequential in order to preserve + binary compatibility with the vmstate dump. Bit 0 (0x0001) was + previously used for CPU_INTERRUPT_EXIT, and is cleared when loading + the vmstate dump. */ + +/* External hardware interrupt pending. This is typically used for + interrupts from devices. */ +#define CPU_INTERRUPT_HARD 0x0002 + +/* Exit the current TB. This is typically used when some system-level device + makes some change to the memory mapping. E.g. the a20 line change. */ +#define CPU_INTERRUPT_EXITTB 0x0004 + +/* Halt the CPU. */ +#define CPU_INTERRUPT_HALT 0x0020 + +/* Debug event pending. */ +#define CPU_INTERRUPT_DEBUG 0x0080 + +/* Several target-specific external hardware interrupts. Each target/cpu.h + should define proper names based on these defines. */ +#define CPU_INTERRUPT_TGT_EXT_0 0x0008 +#define CPU_INTERRUPT_TGT_EXT_1 0x0010 +#define CPU_INTERRUPT_TGT_EXT_2 0x0040 +#define CPU_INTERRUPT_TGT_EXT_3 0x0200 +#define CPU_INTERRUPT_TGT_EXT_4 0x1000 + +/* Several target-specific internal interrupts. These differ from the + preceeding target-specific interrupts in that they are intended to + originate from within the cpu itself, typically in response to some + instruction being executed. These, therefore, are not masked while + single-stepping within the debugger. */ +#define CPU_INTERRUPT_TGT_INT_0 0x0100 +#define CPU_INTERRUPT_TGT_INT_1 0x0400 +#define CPU_INTERRUPT_TGT_INT_2 0x0800 + +/* First unused bit: 0x2000. */ + +/* The set of all bits that should be masked when single-stepping. */ +#define CPU_INTERRUPT_SSTEP_MASK \ + (CPU_INTERRUPT_HARD \ + | CPU_INTERRUPT_TGT_EXT_0 \ + | CPU_INTERRUPT_TGT_EXT_1 \ + | CPU_INTERRUPT_TGT_EXT_2 \ + | CPU_INTERRUPT_TGT_EXT_3 \ + | CPU_INTERRUPT_TGT_EXT_4) + +#ifndef CONFIG_USER_ONLY +typedef void (*CPUInterruptHandler)(CPUState *, int); + +extern CPUInterruptHandler cpu_interrupt_handler; + +static inline void cpu_interrupt(CPUState *s, int mask) +{ + cpu_interrupt_handler(s, mask); +} +#else /* USER_ONLY */ +void cpu_interrupt(CPUState *env, int mask); +#endif /* USER_ONLY */ + void cpu_reset_interrupt(CPUState *env, int mask); void cpu_exit(CPUState *s); -int qemu_cpu_has_work(CPUState *env); +bool qemu_cpu_has_work(CPUState *env); /* Breakpoint/watchpoint flags */ #define BP_MEM_READ 0x01 @@ -804,11 +876,8 @@ void cpu_watchpoint_remove_all(CPUState *env, int mask); void cpu_single_step(CPUState *env, int enabled); void cpu_reset(CPUState *s); - -/* Return the physical page corresponding to a virtual one. Use it - only for debugging because no protection checks are done. Return -1 - if no page found. */ -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr); +int cpu_is_stopped(CPUState *env); +void run_on_cpu(CPUState *env, void (*func)(void *data), void *data); #define CPU_LOG_TB_OUT_ASM (1 << 0) #define CPU_LOG_TB_IN_ASM (1 << 1) @@ -834,32 +903,41 @@ void cpu_set_log(int log_flags); void cpu_set_log_filename(const char *filename); int cpu_str_to_log_mask(const char *str); -/* IO ports API */ - -/* NOTE: as these functions may be even used when there is an isa - brige on non x86 targets, we always defined them */ -#ifndef NO_CPU_IO_DEFS -void cpu_outb(CPUState *env, int addr, int val); -void cpu_outw(CPUState *env, int addr, int val); -void cpu_outl(CPUState *env, int addr, int val); -int cpu_inb(CPUState *env, int addr); -int cpu_inw(CPUState *env, int addr); -int cpu_inl(CPUState *env, int addr); -#endif +#if !defined(CONFIG_USER_ONLY) -/* address in the RAM (different from a physical address) */ -#ifdef CONFIG_KQEMU -typedef uint32_t ram_addr_t; -#else -typedef unsigned long ram_addr_t; -#endif +/* Return the physical page corresponding to a virtual one. Use it + only for debugging because no protection checks are done. Return -1 + if no page found. */ +target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr); /* memory API */ extern int phys_ram_fd; -extern uint8_t *phys_ram_dirty; extern ram_addr_t ram_size; -extern ram_addr_t last_ram_offset; + +/* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */ +#define RAM_PREALLOC_MASK (1 << 0) + +typedef struct RAMBlock { + uint8_t *host; + ram_addr_t offset; + ram_addr_t length; + uint32_t flags; + char idstr[256]; + QLIST_ENTRY(RAMBlock) next; +#if defined(__linux__) && !defined(TARGET_S390X) + int fd; +#endif +} RAMBlock; + +typedef struct RAMList { + uint8_t *phys_dirty; + QLIST_HEAD(ram, RAMBlock) blocks; +} RAMList; +extern RAMList ram_list; + +extern const char *mem_path; +extern int mem_prealloc; /* physical memory access */ @@ -867,19 +945,8 @@ extern ram_addr_t last_ram_offset; 3 flags. The ROMD code stores the page ram offset in iotlb entry, so only a limited number of ids are avaiable. */ -#define IO_MEM_SHIFT 3 #define IO_MEM_NB_ENTRIES (1 << (TARGET_PAGE_BITS - IO_MEM_SHIFT)) -#define IO_MEM_RAM (0 << IO_MEM_SHIFT) /* hardcoded offset */ -#define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */ -#define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT) -#define IO_MEM_NOTDIRTY (3 << IO_MEM_SHIFT) - -/* Acts like a ROM when read and like a device when written. */ -#define IO_MEM_ROMD (1) -#define IO_MEM_SUBPAGE (2) -#define IO_MEM_SUBWIDTH (4) - /* Flags stored in the low bits of the TLB virtual address. These are defined so that fast path ram access is all zeros. */ /* Zero if TLB entry is valid. */ @@ -890,264 +957,74 @@ extern ram_addr_t last_ram_offset; /* Set if TLB entry is an IO callback. */ #define TLB_MMIO (1 << 5) -typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value); -typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); - -void cpu_register_physical_memory_offset(target_phys_addr_t start_addr, - ram_addr_t size, - ram_addr_t phys_offset, - ram_addr_t region_offset); -static inline void cpu_register_physical_memory(target_phys_addr_t start_addr, - ram_addr_t size, - ram_addr_t phys_offset) -{ - cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0); -} - -ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr); -ram_addr_t qemu_ram_alloc(ram_addr_t); -void qemu_ram_free(ram_addr_t addr); -/* This should only be used for ram local to a device. */ -void *qemu_get_ram_ptr(ram_addr_t addr); -/* This should not be used by devices. */ -ram_addr_t qemu_ram_addr_from_host(void *ptr); - -int cpu_register_io_memory(int io_index, - CPUReadMemoryFunc **mem_read, - CPUWriteMemoryFunc **mem_write, - void *opaque); -void cpu_unregister_io_memory(int table_address); -CPUWriteMemoryFunc **cpu_get_io_memory_write(int io_index); -CPUReadMemoryFunc **cpu_get_io_memory_read(int io_index); - -void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, - int len, int is_write); -static inline void cpu_physical_memory_read(target_phys_addr_t addr, - uint8_t *buf, int len) -{ - cpu_physical_memory_rw(addr, buf, len, 0); -} -static inline void cpu_physical_memory_write(target_phys_addr_t addr, - const uint8_t *buf, int len) -{ - cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1); -} -void *cpu_physical_memory_map(target_phys_addr_t addr, - target_phys_addr_t *plen, - int is_write); -void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len, - int is_write, target_phys_addr_t access_len); -void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)); -void cpu_unregister_map_client(void *cookie); - -uint32_t ldub_phys(target_phys_addr_t addr); -uint32_t lduw_phys(target_phys_addr_t addr); -uint32_t ldl_phys(target_phys_addr_t addr); -uint64_t ldq_phys(target_phys_addr_t addr); -void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val); -void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val); -void stb_phys(target_phys_addr_t addr, uint32_t val); -void stw_phys(target_phys_addr_t addr, uint32_t val); -void stl_phys(target_phys_addr_t addr, uint32_t val); -void stq_phys(target_phys_addr_t addr, uint64_t val); - -void cpu_physical_memory_write_rom(target_phys_addr_t addr, - const uint8_t *buf, int len); -int cpu_memory_rw_debug(CPUState *env, target_ulong addr, - uint8_t *buf, int len, int is_write); - #define VGA_DIRTY_FLAG 0x01 #define CODE_DIRTY_FLAG 0x02 -#define KQEMU_DIRTY_FLAG 0x04 #define MIGRATION_DIRTY_FLAG 0x08 /* read dirty bit (return 0 or 1) */ static inline int cpu_physical_memory_is_dirty(ram_addr_t addr) { - return phys_ram_dirty[addr >> TARGET_PAGE_BITS] == 0xff; -} - -static inline int cpu_physical_memory_get_dirty(ram_addr_t addr, - int dirty_flags) -{ - return phys_ram_dirty[addr >> TARGET_PAGE_BITS] & dirty_flags; + return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] == 0xff; } -static inline void cpu_physical_memory_set_dirty(ram_addr_t addr) +static inline int cpu_physical_memory_get_dirty_flags(ram_addr_t addr) { - phys_ram_dirty[addr >> TARGET_PAGE_BITS] = 0xff; + return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS]; } -void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end, - int dirty_flags); -void cpu_tlb_update_dirty(CPUState *env); - -int cpu_physical_memory_set_dirty_tracking(int enable); - -int cpu_physical_memory_get_dirty_tracking(void); - -void cpu_physical_sync_dirty_bitmap(target_phys_addr_t start_addr, target_phys_addr_t end_addr); - -void dump_exec_info(FILE *f, - int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); - -/* Coalesced MMIO regions are areas where write operations can be reordered. - * This usually implies that write operations are side-effect free. This allows - * batching which can make a major impact on performance when using - * virtualization. - */ -void qemu_register_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size); - -void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size); - -/*******************************************/ -/* host CPU ticks (if available) */ - -#if defined(_ARCH_PPC) - -static inline int64_t cpu_get_real_ticks(void) -{ - int64_t retval; -#ifdef _ARCH_PPC64 - /* This reads timebase in one 64bit go and includes Cell workaround from: - http://ozlabs.org/pipermail/linuxppc-dev/2006-October/027052.html - */ - __asm__ __volatile__ ( - "mftb %0\n\t" - "cmpwi %0,0\n\t" - "beq- $-8" - : "=r" (retval)); -#else - /* http://ozlabs.org/pipermail/linuxppc-dev/1999-October/003889.html */ - unsigned long junk; - __asm__ __volatile__ ( - "mftbu %1\n\t" - "mftb %L0\n\t" - "mftbu %0\n\t" - "cmpw %0,%1\n\t" - "bne $-16" - : "=r" (retval), "=r" (junk)); -#endif - return retval; -} - -#elif defined(__i386__) - -static inline int64_t cpu_get_real_ticks(void) +static inline int cpu_physical_memory_get_dirty(ram_addr_t addr, + int dirty_flags) { - int64_t val; - asm volatile ("rdtsc" : "=A" (val)); - return val; + return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] & dirty_flags; } -#elif defined(__x86_64__) - -static inline int64_t cpu_get_real_ticks(void) +static inline void cpu_physical_memory_set_dirty(ram_addr_t addr) { - uint32_t low,high; - int64_t val; - asm volatile("rdtsc" : "=a" (low), "=d" (high)); - val = high; - val <<= 32; - val |= low; - return val; + ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] = 0xff; } -#elif defined(__hppa__) - -static inline int64_t cpu_get_real_ticks(void) +static inline int cpu_physical_memory_set_dirty_flags(ram_addr_t addr, + int dirty_flags) { - int val; - asm volatile ("mfctl %%cr16, %0" : "=r"(val)); - return val; + return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] |= dirty_flags; } -#elif defined(__ia64) - -static inline int64_t cpu_get_real_ticks(void) +static inline void cpu_physical_memory_mask_dirty_range(ram_addr_t start, + int length, + int dirty_flags) { - int64_t val; - asm volatile ("mov %0 = ar.itc" : "=r"(val) :: "memory"); - return val; -} - -#elif defined(__s390__) + int i, mask, len; + uint8_t *p; -static inline int64_t cpu_get_real_ticks(void) -{ - int64_t val; - asm volatile("stck 0(%1)" : "=m" (val) : "a" (&val) : "cc"); - return val; + len = length >> TARGET_PAGE_BITS; + mask = ~dirty_flags; + p = ram_list.phys_dirty + (start >> TARGET_PAGE_BITS); + for (i = 0; i < len; i++) { + p[i] &= mask; + } } -#elif defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__) - -static inline int64_t cpu_get_real_ticks (void) -{ -#if defined(_LP64) - uint64_t rval; - asm volatile("rd %%tick,%0" : "=r"(rval)); - return rval; -#else - union { - uint64_t i64; - struct { - uint32_t high; - uint32_t low; - } i32; - } rval; - asm volatile("rd %%tick,%1; srlx %1,32,%0" - : "=r"(rval.i32.high), "=r"(rval.i32.low)); - return rval.i64; -#endif -} +void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end, + int dirty_flags); +void cpu_tlb_update_dirty(CPUState *env); -#elif defined(__mips__) +int cpu_physical_memory_set_dirty_tracking(int enable); -static inline int64_t cpu_get_real_ticks(void) -{ -#if __mips_isa_rev >= 2 - uint32_t count; - static uint32_t cyc_per_count = 0; +int cpu_physical_memory_get_dirty_tracking(void); - if (!cyc_per_count) - __asm__ __volatile__("rdhwr %0, $3" : "=r" (cyc_per_count)); +int cpu_physical_sync_dirty_bitmap(target_phys_addr_t start_addr, + target_phys_addr_t end_addr); - __asm__ __volatile__("rdhwr %1, $2" : "=r" (count)); - return (int64_t)(count * cyc_per_count); -#else - /* FIXME */ - static int64_t ticks = 0; - return ticks++; -#endif -} +int cpu_physical_log_start(target_phys_addr_t start_addr, + ram_addr_t size); -#else -/* The host CPU doesn't have an easily accessible cycle counter. - Just return a monotonically increasing value. This will be - totally wrong, but hopefully better than nothing. */ -static inline int64_t cpu_get_real_ticks (void) -{ - static int64_t ticks = 0; - return ticks++; -} -#endif +int cpu_physical_log_stop(target_phys_addr_t start_addr, + ram_addr_t size); -/* profiling */ -#ifdef CONFIG_PROFILER -static inline int64_t profile_getclock(void) -{ - return cpu_get_real_ticks(); -} +void dump_exec_info(FILE *f, fprintf_function cpu_fprintf); +#endif /* !CONFIG_USER_ONLY */ -extern int64_t kqemu_time, kqemu_time_start; -extern int64_t qemu_time, qemu_time_start; -extern int64_t tlb_flush_time; -extern int64_t kqemu_exec_count; -extern int64_t dev_time; -extern int64_t kqemu_ret_int_count; -extern int64_t kqemu_ret_excp_count; -extern int64_t kqemu_ret_intr_count; -#endif +int cpu_memory_rw_debug(CPUState *env, target_ulong addr, + uint8_t *buf, int len, int is_write); #endif /* CPU_ALL_H */