X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=disas.c;h=05a7a1260acbf389e08521927fae8bcde420dcad;hb=58a83c61496eeb0d31571a07a51bc1947e3379ac;hp=b801c8f51d4f1d8eae072ff18d6a26e37514cc83;hpb=9b9c37c36439ee0452632253dac7a31897f27f70;p=mirror_qemu.git diff --git a/disas.c b/disas.c index b801c8f51d..05a7a1260a 100644 --- a/disas.c +++ b/disas.c @@ -1,11 +1,16 @@ /* General "disassemble this chunk" code. Used for debugging. */ -#include "config.h" -#include "dis-asm.h" +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "disas/bfd.h" #include "elf.h" -#include #include "cpu.h" -#include "disas.h" +#include "disas/disas.h" + +typedef struct CPUDebug { + struct disassemble_info info; + CPUState *cpu; +} CPUDebug; /* Filled in by elfload.c. Simplistic, but will do for now. */ struct syminfo *syminfos = NULL; @@ -32,7 +37,9 @@ target_read_memory (bfd_vma memaddr, int length, struct disassemble_info *info) { - cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0); + CPUDebug *s = container_of(info, CPUDebug, info); + + cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0); return 0; } @@ -64,14 +71,6 @@ generic_print_address (bfd_vma addr, struct disassemble_info *info) (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr); } -/* Print address in hex, truncated to the width of a target virtual address. */ -static void -generic_print_target_address(bfd_vma addr, struct disassemble_info *info) -{ - uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS); - generic_print_address(addr & mask, info); -} - /* Print address in hex, truncated to the width of a host virtual address. */ static void generic_print_host_address(bfd_vma addr, struct disassemble_info *info) @@ -143,127 +142,108 @@ bfd_vma bfd_getb16 (const bfd_byte *addr) return (bfd_vma) v; } -#ifdef TARGET_ARM -static int -print_insn_thumb1(bfd_vma pc, disassemble_info *info) +static int print_insn_objdump(bfd_vma pc, disassemble_info *info, + const char *prefix) { - return print_insn_arm(pc | 1, info); + int i, n = info->buffer_length; + uint8_t *buf = g_malloc(n); + + info->read_memory_func(pc, buf, n, info); + + for (i = 0; i < n; ++i) { + if (i % 32 == 0) { + info->fprintf_func(info->stream, "\n%s: ", prefix); + } + info->fprintf_func(info->stream, "%02x", buf[i]); + } + + g_free(buf); + return n; +} + +static int print_insn_od_host(bfd_vma pc, disassemble_info *info) +{ + return print_insn_objdump(pc, info, "OBJD-H"); +} + +static int print_insn_od_target(bfd_vma pc, disassemble_info *info) +{ + return print_insn_objdump(pc, info, "OBJD-T"); } -#endif /* Disassemble this for me please... (debugging). 'flags' has the following values: i386 - 1 means 16 bit code, 2 means 64 bit code - arm - bit 0 = thumb, bit 1 = reverse endian - ppc - nonzero means little endian + ppc - bits 0:15 specify (optionally) the machine instruction set; + bit 16 indicates little endian. other targets - unused */ -void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) +void target_disas(FILE *out, CPUState *cpu, target_ulong code, + target_ulong size, int flags) { + CPUClass *cc = CPU_GET_CLASS(cpu); target_ulong pc; int count; - struct disassemble_info disasm_info; - int (*print_insn)(bfd_vma pc, disassemble_info *info); + CPUDebug s; - INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); + INIT_DISASSEMBLE_INFO(s.info, out, fprintf); - disasm_info.read_memory_func = target_read_memory; - disasm_info.buffer_vma = code; - disasm_info.buffer_length = size; - disasm_info.print_address_func = generic_print_target_address; + s.cpu = cpu; + s.info.read_memory_func = target_read_memory; + s.info.buffer_vma = code; + s.info.buffer_length = size; + s.info.print_address_func = generic_print_address; #ifdef TARGET_WORDS_BIGENDIAN - disasm_info.endian = BFD_ENDIAN_BIG; + s.info.endian = BFD_ENDIAN_BIG; #else - disasm_info.endian = BFD_ENDIAN_LITTLE; + s.info.endian = BFD_ENDIAN_LITTLE; #endif + + if (cc->disas_set_info) { + cc->disas_set_info(cpu, &s.info); + } + #if defined(TARGET_I386) - if (flags == 2) - disasm_info.mach = bfd_mach_x86_64; - else if (flags == 1) - disasm_info.mach = bfd_mach_i386_i8086; - else - disasm_info.mach = bfd_mach_i386_i386; - print_insn = print_insn_i386; -#elif defined(TARGET_ARM) - if (flags & 1) { - print_insn = print_insn_thumb1; + if (flags == 2) { + s.info.mach = bfd_mach_x86_64; + } else if (flags == 1) { + s.info.mach = bfd_mach_i386_i8086; } else { - print_insn = print_insn_arm; - } - if (flags & 2) { -#ifdef TARGET_WORDS_BIGENDIAN - disasm_info.endian = BFD_ENDIAN_LITTLE; -#else - disasm_info.endian = BFD_ENDIAN_BIG; -#endif + s.info.mach = bfd_mach_i386_i386; } -#elif defined(TARGET_SPARC) - print_insn = print_insn_sparc; -#ifdef TARGET_SPARC64 - disasm_info.mach = bfd_mach_sparc_v9b; -#endif + s.info.print_insn = print_insn_i386; #elif defined(TARGET_PPC) - if (flags >> 16) - disasm_info.endian = BFD_ENDIAN_LITTLE; + if ((flags >> 16) & 1) { + s.info.endian = BFD_ENDIAN_LITTLE; + } if (flags & 0xFFFF) { - /* If we have a precise definitions of the instructions set, use it */ - disasm_info.mach = flags & 0xFFFF; + /* If we have a precise definition of the instruction set, use it. */ + s.info.mach = flags & 0xFFFF; } else { #ifdef TARGET_PPC64 - disasm_info.mach = bfd_mach_ppc64; + s.info.mach = bfd_mach_ppc64; #else - disasm_info.mach = bfd_mach_ppc; + s.info.mach = bfd_mach_ppc; #endif } - print_insn = print_insn_ppc; -#elif defined(TARGET_M68K) - print_insn = print_insn_m68k; -#elif defined(TARGET_MIPS) -#ifdef TARGET_WORDS_BIGENDIAN - print_insn = print_insn_big_mips; -#else - print_insn = print_insn_little_mips; + s.info.disassembler_options = (char *)"any"; + s.info.print_insn = print_insn_ppc; #endif -#elif defined(TARGET_SH4) - disasm_info.mach = bfd_mach_sh4; - print_insn = print_insn_sh; -#elif defined(TARGET_ALPHA) - disasm_info.mach = bfd_mach_alpha_ev6; - print_insn = print_insn_alpha; -#elif defined(TARGET_CRIS) - if (flags != 32) { - disasm_info.mach = bfd_mach_cris_v0_v10; - print_insn = print_insn_crisv10; - } else { - disasm_info.mach = bfd_mach_cris_v32; - print_insn = print_insn_crisv32; + if (s.info.print_insn == NULL) { + s.info.print_insn = print_insn_od_target; } -#elif defined(TARGET_S390X) - disasm_info.mach = bfd_mach_s390_64; - print_insn = print_insn_s390; -#elif defined(TARGET_MICROBLAZE) - disasm_info.mach = bfd_arch_microblaze; - print_insn = print_insn_microblaze; -#elif defined(TARGET_LM32) - disasm_info.mach = bfd_mach_lm32; - print_insn = print_insn_lm32; -#else - fprintf(out, "0x" TARGET_FMT_lx - ": Asm output not supported on this arch\n", code); - return; -#endif for (pc = code; size > 0; pc += count, size -= count) { fprintf(out, "0x" TARGET_FMT_lx ": ", pc); - count = print_insn(pc, &disasm_info); + count = s.info.print_insn(pc, &s.info); #if 0 { int i; uint8_t b; fprintf(out, " {"); for(i = 0; i < count; i++) { - target_read_memory(pc + i, &b, 1, &disasm_info); + target_read_memory(pc + i, &b, 1, &s.info); fprintf(out, " %02x", b); } fprintf(out, " }"); @@ -287,36 +267,39 @@ void disas(FILE *out, void *code, unsigned long size) { uintptr_t pc; int count; - struct disassemble_info disasm_info; - int (*print_insn)(bfd_vma pc, disassemble_info *info); + CPUDebug s; + int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL; - INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); - disasm_info.print_address_func = generic_print_host_address; + INIT_DISASSEMBLE_INFO(s.info, out, fprintf); + s.info.print_address_func = generic_print_host_address; - disasm_info.buffer = code; - disasm_info.buffer_vma = (uintptr_t)code; - disasm_info.buffer_length = size; + s.info.buffer = code; + s.info.buffer_vma = (uintptr_t)code; + s.info.buffer_length = size; #ifdef HOST_WORDS_BIGENDIAN - disasm_info.endian = BFD_ENDIAN_BIG; + s.info.endian = BFD_ENDIAN_BIG; #else - disasm_info.endian = BFD_ENDIAN_LITTLE; + s.info.endian = BFD_ENDIAN_LITTLE; #endif #if defined(CONFIG_TCG_INTERPRETER) print_insn = print_insn_tci; #elif defined(__i386__) - disasm_info.mach = bfd_mach_i386_i386; + s.info.mach = bfd_mach_i386_i386; print_insn = print_insn_i386; #elif defined(__x86_64__) - disasm_info.mach = bfd_mach_x86_64; + s.info.mach = bfd_mach_x86_64; print_insn = print_insn_i386; #elif defined(_ARCH_PPC) + s.info.disassembler_options = (char *)"any"; print_insn = print_insn_ppc; +#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS) + print_insn = print_insn_arm_a64; #elif defined(__alpha__) print_insn = print_insn_alpha; #elif defined(__sparc__) print_insn = print_insn_sparc; - disasm_info.mach = bfd_mach_sparc_v9b; + s.info.mach = bfd_mach_sparc_v9b; #elif defined(__arm__) print_insn = print_insn_arm; #elif defined(__MIPSEB__) @@ -331,14 +314,13 @@ void disas(FILE *out, void *code, unsigned long size) print_insn = print_insn_hppa; #elif defined(__ia64__) print_insn = print_insn_ia64; -#else - fprintf(out, "0x%lx: Asm output not supported on this arch\n", - (long) code); - return; #endif + if (print_insn == NULL) { + print_insn = print_insn_od_host; + } for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) { fprintf(out, "0x%08" PRIxPTR ": ", pc); - count = print_insn(pc, &disasm_info); + count = print_insn(pc, &s.info); fprintf(out, "\n"); if (count < 0) break; @@ -363,104 +345,86 @@ const char *lookup_symbol(target_ulong orig_addr) #if !defined(CONFIG_USER_ONLY) -#include "monitor.h" +#include "monitor/monitor.h" static int monitor_disas_is_physical; -static CPUArchState *monitor_disas_env; static int monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length, struct disassemble_info *info) { + CPUDebug *s = container_of(info, CPUDebug, info); + if (monitor_disas_is_physical) { cpu_physical_memory_read(memaddr, myaddr, length); } else { - cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0); + cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0); } return 0; } -static int GCC_FMT_ATTR(2, 3) -monitor_fprintf(FILE *stream, const char *fmt, ...) -{ - va_list ap; - va_start(ap, fmt); - monitor_vprintf((Monitor *)stream, fmt, ap); - va_end(ap); - return 0; -} - -void monitor_disas(Monitor *mon, CPUArchState *env, +/* Disassembler for the monitor. + See target_disas for a description of flags. */ +void monitor_disas(Monitor *mon, CPUState *cpu, target_ulong pc, int nb_insn, int is_physical, int flags) { + CPUClass *cc = CPU_GET_CLASS(cpu); int count, i; - struct disassemble_info disasm_info; - int (*print_insn)(bfd_vma pc, disassemble_info *info); + CPUDebug s; - INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf); + INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf); - monitor_disas_env = env; + s.cpu = cpu; monitor_disas_is_physical = is_physical; - disasm_info.read_memory_func = monitor_read_memory; - disasm_info.print_address_func = generic_print_target_address; + s.info.read_memory_func = monitor_read_memory; + s.info.print_address_func = generic_print_address; - disasm_info.buffer_vma = pc; + s.info.buffer_vma = pc; #ifdef TARGET_WORDS_BIGENDIAN - disasm_info.endian = BFD_ENDIAN_BIG; + s.info.endian = BFD_ENDIAN_BIG; #else - disasm_info.endian = BFD_ENDIAN_LITTLE; + s.info.endian = BFD_ENDIAN_LITTLE; #endif + + if (cc->disas_set_info) { + cc->disas_set_info(cpu, &s.info); + } + #if defined(TARGET_I386) - if (flags == 2) - disasm_info.mach = bfd_mach_x86_64; - else if (flags == 1) - disasm_info.mach = bfd_mach_i386_i8086; - else - disasm_info.mach = bfd_mach_i386_i386; - print_insn = print_insn_i386; -#elif defined(TARGET_ARM) - print_insn = print_insn_arm; -#elif defined(TARGET_ALPHA) - print_insn = print_insn_alpha; -#elif defined(TARGET_SPARC) - print_insn = print_insn_sparc; -#ifdef TARGET_SPARC64 - disasm_info.mach = bfd_mach_sparc_v9b; -#endif + if (flags == 2) { + s.info.mach = bfd_mach_x86_64; + } else if (flags == 1) { + s.info.mach = bfd_mach_i386_i8086; + } else { + s.info.mach = bfd_mach_i386_i386; + } + s.info.print_insn = print_insn_i386; #elif defined(TARGET_PPC) + if (flags & 0xFFFF) { + /* If we have a precise definition of the instruction set, use it. */ + s.info.mach = flags & 0xFFFF; + } else { #ifdef TARGET_PPC64 - disasm_info.mach = bfd_mach_ppc64; -#else - disasm_info.mach = bfd_mach_ppc; -#endif - print_insn = print_insn_ppc; -#elif defined(TARGET_M68K) - print_insn = print_insn_m68k; -#elif defined(TARGET_MIPS) -#ifdef TARGET_WORDS_BIGENDIAN - print_insn = print_insn_big_mips; + s.info.mach = bfd_mach_ppc64; #else - print_insn = print_insn_little_mips; + s.info.mach = bfd_mach_ppc; #endif -#elif defined(TARGET_SH4) - disasm_info.mach = bfd_mach_sh4; - print_insn = print_insn_sh; -#elif defined(TARGET_S390X) - disasm_info.mach = bfd_mach_s390_64; - print_insn = print_insn_s390; -#elif defined(TARGET_LM32) - disasm_info.mach = bfd_mach_lm32; - print_insn = print_insn_lm32; -#else - monitor_printf(mon, "0x" TARGET_FMT_lx - ": Asm output not supported on this arch\n", pc); - return; + } + if ((flags >> 16) & 1) { + s.info.endian = BFD_ENDIAN_LITTLE; + } + s.info.print_insn = print_insn_ppc; #endif + if (!s.info.print_insn) { + monitor_printf(mon, "0x" TARGET_FMT_lx + ": Asm output not supported on this arch\n", pc); + return; + } for(i = 0; i < nb_insn; i++) { monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc); - count = print_insn(pc, &disasm_info); + count = s.info.print_insn(pc, &s.info); monitor_printf(mon, "\n"); if (count < 0) break;