X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=hw%2Fapic_internal.h;h=dcbbfd41cb9f5c7deafdd28d2c53d69e901eef99;hb=1de7afc984b49af164e2619e6850b9732b173b34;hp=1c6971cc63ef0a824ca56d7ad59d128b36d77c5d;hpb=999e12bbe85c5dcf49bef13bce4f97399c7105f4;p=qemu.git diff --git a/hw/apic_internal.h b/hw/apic_internal.h index 1c6971cc6..dcbbfd41c 100644 --- a/hw/apic_internal.h +++ b/hw/apic_internal.h @@ -20,9 +20,9 @@ #ifndef QEMU_APIC_INTERNAL_H #define QEMU_APIC_INTERNAL_H -#include "memory.h" +#include "exec/memory.h" #include "sysbus.h" -#include "qemu-timer.h" +#include "qemu/timer.h" /* APIC Local Vector Table */ #define APIC_LVT_TIMER 0 @@ -61,6 +61,9 @@ #define APIC_SV_DIRECTED_IO (1<<12) #define APIC_SV_ENABLE (1<<8) +#define VAPIC_ENABLE_BIT 0 +#define VAPIC_ENABLE_MASK (1 << VAPIC_ENABLE_BIT) + #define MAX_APICS 255 #define MSI_SPACE_SIZE 0x100000 @@ -82,14 +85,19 @@ typedef struct APICCommonClass void (*init)(APICCommonState *s); void (*set_base)(APICCommonState *s, uint64_t val); void (*set_tpr)(APICCommonState *s, uint8_t val); + uint8_t (*get_tpr)(APICCommonState *s); + void (*enable_tpr_reporting)(APICCommonState *s, bool enable); + void (*vapic_base_update)(APICCommonState *s); void (*external_nmi)(APICCommonState *s); + void (*pre_save)(APICCommonState *s); void (*post_load)(APICCommonState *s); } APICCommonClass; struct APICCommonState { SysBusDevice busdev; + MemoryRegion io_memory; - void *cpu_env; + X86CPU *cpu; uint32_t apicbase; uint8_t id; uint8_t arb_id; @@ -114,10 +122,28 @@ struct APICCommonState { int64_t timer_expiry; int sipi_vector; int wait_for_sipi; + + uint32_t vapic_control; + DeviceState *vapic; + hwaddr vapic_paddr; /* note: persistence via kvmvapic */ }; +typedef struct VAPICState { + uint8_t tpr; + uint8_t isr; + uint8_t zero; + uint8_t irr; + uint8_t enabled; +} QEMU_PACKED VAPICState; + +extern bool apic_report_tpr_access; + void apic_report_irq_delivered(int delivered); -void apic_qdev_register(DeviceInfo *info); bool apic_next_timer(APICCommonState *s, int64_t current_time); +void apic_enable_tpr_access_reporting(DeviceState *d, bool enable); +void apic_enable_vapic(DeviceState *d, hwaddr paddr); + +void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip, + TPRAccess access); #endif /* !QEMU_APIC_INTERNAL_H */