X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=hw%2Fdisplay%2Ftc6393xb.c;h=e1b1e302f23056cd99b2afea74d455b828f089c3;hb=be812c0ab7d5ab741d0d87387a75a0e8bb6461e7;hp=f4011d2db00dd2668f21bbe6c6a82281d78fb5b1;hpb=6fc0303b95c873d9e384d7fb51e412ac2e53b9c1;p=mirror_qemu.git diff --git a/hw/display/tc6393xb.c b/hw/display/tc6393xb.c index f4011d2db0..e1b1e302f2 100644 --- a/hw/display/tc6393xb.c +++ b/hw/display/tc6393xb.c @@ -10,6 +10,9 @@ * Contributions after 2012-01-13 are licensed under the terms of the * GNU GPL, version 2 or (at your option) any later version. */ +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu/host-utils.h" #include "hw/hw.h" #include "hw/devices.h" #include "hw/block/flash.h" @@ -144,7 +147,7 @@ static void tc6393xb_gpio_set(void *opaque, int line, int level) // TC6393xbState *s = opaque; if (line > TC6393XB_GPIOS) { - printf("%s: No GPIO pin %i\n", __FUNCTION__, line); + printf("%s: No GPIO pin %i\n", __func__, line); return; } @@ -168,9 +171,10 @@ static void tc6393xb_gpio_handler_update(TC6393xbState *s) int bit; level = s->gpio_level & s->gpio_dir; + level &= MAKE_64BIT_MASK(0, TC6393XB_GPIOS); for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) { - bit = ffs(diff) - 1; + bit = ctz32(diff); qemu_set_irq(s->handler[bit], (level >> bit) & 1); } @@ -315,7 +319,7 @@ static void tc6393xb_scr_writeb(TC6393xbState *s, hwaddr addr, uint32_t value) SCR_REG_B(DEBUG); } fprintf(stderr, "tc6393xb_scr: unhandled write at %08x: %02x\n", - (uint32_t) addr, value & 0xff); + (uint32_t) addr, value & 0xff); } #undef SCR_REG_B #undef SCR_REG_W @@ -354,7 +358,7 @@ static void tc6393xb_nand_cfg_writeb(TC6393xbState *s, hwaddr addr, uint32_t val return; } fprintf(stderr, "tc6393xb_nand_cfg: unhandled write at %08x: %02x\n", - (uint32_t) addr, value & 0xff); + (uint32_t) addr, value & 0xff); } static uint32_t tc6393xb_nand_readb(TC6393xbState *s, hwaddr addr) { @@ -417,7 +421,7 @@ static void tc6393xb_nand_writeb(TC6393xbState *s, hwaddr addr, uint32_t value) return; } fprintf(stderr, "tc6393xb_nand: unhandled write at %08x: %02x\n", - (uint32_t) addr, value & 0xff); + (uint32_t) addr, value & 0xff); } #define BITS 8 @@ -457,7 +461,7 @@ static void tc6393xb_draw_graphic(TC6393xbState *s, int full_update) return; } - dpy_gfx_update(s->con, 0, 0, s->scr_width, s->scr_height); + dpy_gfx_update_full(s->con); } static void tc6393xb_draw_blank(TC6393xbState *s, int full_update) @@ -476,7 +480,7 @@ static void tc6393xb_draw_blank(TC6393xbState *s, int full_update) d += surface_stride(surface); } - dpy_gfx_update(s->con, 0, 0, s->scr_width, s->scr_height); + dpy_gfx_update_full(s->con); } static void tc6393xb_update_display(void *opaque) @@ -570,19 +574,20 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq) s->irq = irq; s->gpio_in = qemu_allocate_irqs(tc6393xb_gpio_set, s, TC6393XB_GPIOS); - s->l3v = *qemu_allocate_irqs(tc6393xb_l3v, s, 1); + s->l3v = qemu_allocate_irq(tc6393xb_l3v, s, 0); s->blanked = 1; s->sub_irqs = qemu_allocate_irqs(tc6393xb_sub_irq, s, TC6393XB_NR_IRQS); nand = drive_get(IF_MTD, 0, 0); - s->flash = nand_init(nand ? nand->bdrv : NULL, NAND_MFR_TOSHIBA, 0x76); + s->flash = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, + NAND_MFR_TOSHIBA, 0x76); memory_region_init_io(&s->iomem, NULL, &tc6393xb_ops, s, "tc6393xb", 0x10000); memory_region_add_subregion(sysmem, base, &s->iomem); - memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000); - vmstate_register_ram_global(&s->vram); + memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000, + &error_fatal); s->vram_ptr = memory_region_get_ram_ptr(&s->vram); memory_region_add_subregion(sysmem, base + 0x100000, &s->vram); s->scr_width = 480;