X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=hw%2Fppc%2Fspapr_rtas_ddw.c;h=f6538189f4fc9df53e1b7395fa78d96082953c95;hb=4aca9786542e427d4337503566efdf09f2cb87cd;hp=177dcffc9b05a9e616f1fb1096da66ccd3db03b4;hpb=791b7d2340cfafcac9af7864343cf23504d57804;p=mirror_qemu.git diff --git a/hw/ppc/spapr_rtas_ddw.c b/hw/ppc/spapr_rtas_ddw.c index 177dcffc9b..f6538189f4 100644 --- a/hw/ppc/spapr_rtas_ddw.c +++ b/hw/ppc/spapr_rtas_ddw.c @@ -26,16 +26,16 @@ static int spapr_phb_get_active_win_num_cb(Object *child, void *opaque) { - sPAPRTCETable *tcet; + SpaprTceTable *tcet; - tcet = (sPAPRTCETable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE); + tcet = (SpaprTceTable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE); if (tcet && tcet->nb_table) { ++*(unsigned *)opaque; } return 0; } -static unsigned spapr_phb_get_active_win_num(sPAPRPHBState *sphb) +static unsigned spapr_phb_get_active_win_num(SpaprPhbState *sphb) { unsigned ret = 0; @@ -46,9 +46,9 @@ static unsigned spapr_phb_get_active_win_num(sPAPRPHBState *sphb) static int spapr_phb_get_free_liobn_cb(Object *child, void *opaque) { - sPAPRTCETable *tcet; + SpaprTceTable *tcet; - tcet = (sPAPRTCETable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE); + tcet = (SpaprTceTable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE); if (tcet && !tcet->nb_table) { *(uint32_t *)opaque = tcet->liobn; return 1; @@ -56,7 +56,7 @@ static int spapr_phb_get_free_liobn_cb(Object *child, void *opaque) return 0; } -static unsigned spapr_phb_get_free_liobn(sPAPRPHBState *sphb) +static unsigned spapr_phb_get_free_liobn(SpaprPhbState *sphb) { uint32_t liobn = 0; @@ -90,15 +90,14 @@ static uint32_t spapr_page_mask_to_query_mask(uint64_t page_mask) } static void rtas_ibm_query_pe_dma_window(PowerPCCPU *cpu, - sPAPRMachineState *spapr, + SpaprMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { - sPAPRPHBState *sphb; - uint64_t buid, max_window_size; + SpaprPhbState *sphb; + uint64_t buid; uint32_t avail, addr, pgmask = 0; - MachineState *machine = MACHINE(spapr); if ((nargs != 3) || (nret != 5)) { goto param_error_exit; @@ -114,28 +113,15 @@ static void rtas_ibm_query_pe_dma_window(PowerPCCPU *cpu, /* Translate page mask to LoPAPR format */ pgmask = spapr_page_mask_to_query_mask(sphb->page_size_mask); - /* - * This is "Largest contiguous block of TCEs allocated specifically - * for (that is, are reserved for) this PE". - * Return the maximum number as maximum supported RAM size was in 4K pages. - */ - if (machine->ram_size == machine->maxram_size) { - max_window_size = machine->ram_size; - } else { - MemoryHotplugState *hpms = &spapr->hotplug_memory; - - max_window_size = hpms->base + memory_region_size(&hpms->mr); - } - avail = SPAPR_PCI_DMA_MAX_WINDOWS - spapr_phb_get_active_win_num(sphb); rtas_st(rets, 0, RTAS_OUT_SUCCESS); rtas_st(rets, 1, avail); - rtas_st(rets, 2, max_window_size >> SPAPR_TCE_PAGE_SHIFT); + rtas_st(rets, 2, 0x80000000); /* The largest window we can possibly have */ rtas_st(rets, 3, pgmask); rtas_st(rets, 4, 0); /* DMA migration mask, not supported */ - trace_spapr_iommu_ddw_query(buid, addr, avail, max_window_size, pgmask); + trace_spapr_iommu_ddw_query(buid, addr, avail, 0x80000000, pgmask); return; param_error_exit: @@ -143,13 +129,13 @@ param_error_exit: } static void rtas_ibm_create_pe_dma_window(PowerPCCPU *cpu, - sPAPRMachineState *spapr, + SpaprMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { - sPAPRPHBState *sphb; - sPAPRTCETable *tcet = NULL; + SpaprPhbState *sphb; + SpaprTceTable *tcet = NULL; uint32_t addr, page_shift, window_shift, liobn; uint64_t buid, win_addr; int windows; @@ -185,8 +171,18 @@ static void rtas_ibm_create_pe_dma_window(PowerPCCPU *cpu, } win_addr = (windows == 0) ? sphb->dma_win_addr : sphb->dma64_win_addr; + /* + * We have just created a window, we know for the fact that it is empty, + * use a hack to avoid iterating over the table as it is quite possible + * to have billions of TCEs, all empty. + * Note that we cannot delay this to the first H_PUT_TCE as this hcall is + * mostly likely to be handled in KVM so QEMU just does not know if it + * happened. + */ + tcet->skipping_replay = true; spapr_tce_table_enable(tcet, page_shift, win_addr, 1ULL << (window_shift - page_shift)); + tcet->skipping_replay = false; if (!tcet->nb_table) { goto hw_error_exit; } @@ -210,13 +206,13 @@ param_error_exit: } static void rtas_ibm_remove_pe_dma_window(PowerPCCPU *cpu, - sPAPRMachineState *spapr, + SpaprMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { - sPAPRPHBState *sphb; - sPAPRTCETable *tcet; + SpaprPhbState *sphb; + SpaprTceTable *tcet; uint32_t liobn; if ((nargs != 1) || (nret != 1)) { @@ -245,12 +241,12 @@ param_error_exit: } static void rtas_ibm_reset_pe_dma_window(PowerPCCPU *cpu, - sPAPRMachineState *spapr, + SpaprMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { - sPAPRPHBState *sphb; + SpaprPhbState *sphb; uint64_t buid; uint32_t addr;