X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=softmmu_header.h;h=2f95c334094cf49f8ee0937ba35e481ccbc79029;hb=7ec7f28019dff4ab00ff907f7b4e7261da593279;hp=81c65dc870a5211b60d5066c920f13a6d4b094f2;hpb=3f87bf69590c6b3aead85c4ebb8cc7c9c81ccda5;p=qemu.git diff --git a/softmmu_header.h b/softmmu_header.h index 81c65dc87..2f95c3340 100644 --- a/softmmu_header.h +++ b/softmmu_header.h @@ -1,6 +1,6 @@ /* * Software MMU support - * + * * Copyright (c) 2003 Fabrice Bellard * * This library is free software; you can redistribute it and/or @@ -14,8 +14,7 @@ * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * License along with this library; if not, see . */ #if DATA_SIZE == 8 #define SUFFIX q @@ -39,40 +38,19 @@ #error unsupported data size #endif -#if ACCESS_TYPE == 0 - -#define CPU_MEM_INDEX 0 -#define MMUSUFFIX _mmu - -#elif ACCESS_TYPE == 1 +#if ACCESS_TYPE < (NB_MMU_MODES) -#define CPU_MEM_INDEX 1 +#define CPU_MMU_INDEX ACCESS_TYPE #define MMUSUFFIX _mmu -#elif ACCESS_TYPE == 2 +#elif ACCESS_TYPE == (NB_MMU_MODES) -#ifdef TARGET_I386 -#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) -#elif defined (TARGET_PPC) -#define CPU_MEM_INDEX (msr_pr) -#elif defined (TARGET_MIPS) -#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) -#elif defined (TARGET_SPARC) -#define CPU_MEM_INDEX ((env->psrs) == 0) -#endif +#define CPU_MMU_INDEX (cpu_mmu_index(env)) #define MMUSUFFIX _mmu -#elif ACCESS_TYPE == 3 +#elif ACCESS_TYPE == (NB_MMU_MODES + 1) -#ifdef TARGET_I386 -#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) -#elif defined (TARGET_PPC) -#define CPU_MEM_INDEX (msr_pr) -#elif defined (TARGET_MIPS) -#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) -#elif defined (TARGET_SPARC) -#define CPU_MEM_INDEX ((env->psrs) == 0) -#endif +#define CPU_MMU_INDEX (cpu_mmu_index(env)) #define MMUSUFFIX _cmmu #else @@ -82,177 +60,33 @@ #if DATA_SIZE == 8 #define RES_TYPE uint64_t #else -#define RES_TYPE int -#endif - - -DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, - int is_user); -void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user); - -#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \ - (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU) - -static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) -{ - int res; - - asm volatile ("movl %1, %%edx\n" - "movl %1, %%eax\n" - "shrl %3, %%edx\n" - "andl %4, %%eax\n" - "andl %2, %%edx\n" - "leal %5(%%edx, %%ebp), %%edx\n" - "cmpl (%%edx), %%eax\n" - "movl %1, %%eax\n" - "je 1f\n" - "pushl %6\n" - "call %7\n" - "popl %%edx\n" - "movl %%eax, %0\n" - "jmp 2f\n" - "1:\n" - "addl 4(%%edx), %%eax\n" -#if DATA_SIZE == 1 - "movzbl (%%eax), %0\n" -#elif DATA_SIZE == 2 - "movzwl (%%eax), %0\n" -#elif DATA_SIZE == 4 - "movl (%%eax), %0\n" -#else -#error unsupported size -#endif - "2:\n" - : "=r" (res) - : "r" (ptr), - "i" ((CPU_TLB_SIZE - 1) << 3), - "i" (TARGET_PAGE_BITS - 3), - "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), - "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)), - "i" (CPU_MEM_INDEX), - "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX)) - : "%eax", "%ecx", "%edx", "memory", "cc"); - return res; -} - -#if DATA_SIZE <= 2 -static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) -{ - int res; - - asm volatile ("movl %1, %%edx\n" - "movl %1, %%eax\n" - "shrl %3, %%edx\n" - "andl %4, %%eax\n" - "andl %2, %%edx\n" - "leal %5(%%edx, %%ebp), %%edx\n" - "cmpl (%%edx), %%eax\n" - "movl %1, %%eax\n" - "je 1f\n" - "pushl %6\n" - "call %7\n" - "popl %%edx\n" -#if DATA_SIZE == 1 - "movsbl %%al, %0\n" -#elif DATA_SIZE == 2 - "movswl %%ax, %0\n" -#else -#error unsupported size -#endif - "jmp 2f\n" - "1:\n" - "addl 4(%%edx), %%eax\n" -#if DATA_SIZE == 1 - "movsbl (%%eax), %0\n" -#elif DATA_SIZE == 2 - "movswl (%%eax), %0\n" -#else -#error unsupported size -#endif - "2:\n" - : "=r" (res) - : "r" (ptr), - "i" ((CPU_TLB_SIZE - 1) << 3), - "i" (TARGET_PAGE_BITS - 3), - "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), - "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)), - "i" (CPU_MEM_INDEX), - "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX)) - : "%eax", "%ecx", "%edx", "memory", "cc"); - return res; -} +#define RES_TYPE uint32_t #endif -static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) -{ - asm volatile ("movl %0, %%edx\n" - "movl %0, %%eax\n" - "shrl %3, %%edx\n" - "andl %4, %%eax\n" - "andl %2, %%edx\n" - "leal %5(%%edx, %%ebp), %%edx\n" - "cmpl (%%edx), %%eax\n" - "movl %0, %%eax\n" - "je 1f\n" -#if DATA_SIZE == 1 - "movzbl %b1, %%edx\n" -#elif DATA_SIZE == 2 - "movzwl %w1, %%edx\n" -#elif DATA_SIZE == 4 - "movl %1, %%edx\n" -#else -#error unsupported size -#endif - "pushl %6\n" - "call %7\n" - "popl %%eax\n" - "jmp 2f\n" - "1:\n" - "addl 4(%%edx), %%eax\n" -#if DATA_SIZE == 1 - "movb %b1, (%%eax)\n" -#elif DATA_SIZE == 2 - "movw %w1, (%%eax)\n" -#elif DATA_SIZE == 4 - "movl %1, (%%eax)\n" +#if ACCESS_TYPE == (NB_MMU_MODES + 1) +#define ADDR_READ addr_code #else -#error unsupported size +#define ADDR_READ addr_read #endif - "2:\n" - : - : "r" (ptr), -/* NOTE: 'q' would be needed as constraint, but we could not use it - with T1 ! */ - "r" (v), - "i" ((CPU_TLB_SIZE - 1) << 3), - "i" (TARGET_PAGE_BITS - 3), - "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), - "m" (*(uint32_t *)offsetof(CPUState, tlb_write[CPU_MEM_INDEX][0].address)), - "i" (CPU_MEM_INDEX), - "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX)) - : "%eax", "%ecx", "%edx", "memory", "cc"); -} - -#else /* generic load/store macros */ static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) { - int index; + int page_index; RES_TYPE res; target_ulong addr; unsigned long physaddr; - int is_user; + int mmu_idx; addr = ptr; - index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); - is_user = CPU_MEM_INDEX; - if (__builtin_expect(env->tlb_read[is_user][index].address != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { - res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user); + page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + mmu_idx = CPU_MMU_INDEX; + if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != + (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { + res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); } else { - physaddr = addr + env->tlb_read[is_user][index].addend; + physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr); } return res; @@ -261,47 +95,51 @@ static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) #if DATA_SIZE <= 2 static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) { - int res, index; + int res, page_index; target_ulong addr; unsigned long physaddr; - int is_user; + int mmu_idx; addr = ptr; - index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); - is_user = CPU_MEM_INDEX; - if (__builtin_expect(env->tlb_read[is_user][index].address != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { - res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user); + page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + mmu_idx = CPU_MMU_INDEX; + if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != + (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { + res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); } else { - physaddr = addr + env->tlb_read[is_user][index].addend; + physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr); } return res; } #endif +#if ACCESS_TYPE != (NB_MMU_MODES + 1) + /* generic store macro */ static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) { - int index; + int page_index; target_ulong addr; unsigned long physaddr; - int is_user; + int mmu_idx; addr = ptr; - index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); - is_user = CPU_MEM_INDEX; - if (__builtin_expect(env->tlb_write[is_user][index].address != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { - glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user); + page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + mmu_idx = CPU_MMU_INDEX; + if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write != + (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { + glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx); } else { - physaddr = addr + env->tlb_write[is_user][index].addend; + physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v); } } -#endif +#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ + +#if ACCESS_TYPE != (NB_MMU_MODES + 1) #if DATA_SIZE == 8 static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr) @@ -347,11 +185,14 @@ static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v) } #endif /* DATA_SIZE == 4 */ +#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ + #undef RES_TYPE #undef DATA_TYPE #undef DATA_STYPE #undef SUFFIX #undef USUFFIX #undef DATA_SIZE -#undef CPU_MEM_INDEX +#undef CPU_MMU_INDEX #undef MMUSUFFIX +#undef ADDR_READ