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drm/i915: break TGL pci-ids in GT 1 & 2
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Fri, 28 Aug 2020 13:31:25 +0000 (16:31 +0300)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Mon, 31 Aug 2020 14:58:26 +0000 (17:58 +0300)
commitd452bd091e168f75ec2807c30eec1f7be918c737
tree170120da31dd3f9e95391f57f7f7e4323d21830dtree
parent2034c2129bc4a91d471815d4dc7a2a69eaa5338dcommit | diff
drm/i915: break TGL pci-ids in GT 1 & 2

I'll need this in IGT to identify the different kind of GTs and apply
the right performance query configuration.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200828133125.157171-1-lionel.g.landwerlin@intel.com
include/drm/i915_pciids.h diff | blob | blame | history
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