Since we *might* have user emulation with softmmu,
replace the system emulation check by !user emulation one.
Invert some if() ladders for clarity.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230613133347.82210-4-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
}
memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
}
memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
-#ifdef CONFIG_SOFTMMU
- cpu_m68k_set_sr(env, SR_S | SR_I);
-#else
+#else
+ cpu_m68k_set_sr(env, SR_S | SR_I);
#endif
for (i = 0; i < 8; i++) {
env->fregs[i].d = nan;
#endif
for (i = 0; i < 8; i++) {
env->fregs[i].d = nan;
cpu_set_cpustate_pointers(cpu);
}
cpu_set_cpustate_pointers(cpu);
}
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
static bool fpu_needed(void *opaque)
{
M68kCPU *s = opaque;
static bool fpu_needed(void *opaque)
{
M68kCPU *s = opaque;
-#ifndef CONFIG_USER_ONLY
#include "hw/core/sysemu-cpu-ops.h"
static const struct SysemuCPUOps m68k_sysemu_ops = {
.get_phys_page_debug = m68k_cpu_get_phys_page_debug,
};
#include "hw/core/sysemu-cpu-ops.h"
static const struct SysemuCPUOps m68k_sysemu_ops = {
.get_phys_page_debug = m68k_cpu_get_phys_page_debug,
};
+#endif /* !CONFIG_USER_ONLY */
#include "hw/core/tcg-cpu-ops.h"
#include "hw/core/tcg-cpu-ops.h"
cc->get_pc = m68k_cpu_get_pc;
cc->gdb_read_register = m68k_cpu_gdb_read_register;
cc->gdb_write_register = m68k_cpu_gdb_write_register;
cc->get_pc = m68k_cpu_get_pc;
cc->gdb_read_register = m68k_cpu_gdb_read_register;
cc->gdb_write_register = m68k_cpu_gdb_write_register;
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
dc->vmsd = &vmstate_m68k_cpu;
cc->sysemu_ops = &m68k_sysemu_ops;
#endif
dc->vmsd = &vmstate_m68k_cpu;
cc->sysemu_ops = &m68k_sysemu_ops;
#endif
env->macc[acc + 1] = res;
}
env->macc[acc + 1] = res;
}
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
void HELPER(ptest)(CPUM68KState *env, uint32_t addr, uint32_t is_read)
{
hwaddr physical;
void HELPER(ptest)(CPUM68KState *env, uint32_t addr, uint32_t is_read)
{
hwaddr physical;
{
/* FIXME: reset all except CPU */
}
{
/* FIXME: reset all except CPU */
}
+#endif /* !CONFIG_USER_ONLY */
DEF_HELPER_3(chk, void, env, s32, s32)
DEF_HELPER_4(chk2, void, env, s32, s32, s32)
DEF_HELPER_3(chk, void, env, s32, s32)
DEF_HELPER_4(chk2, void, env, s32, s32, s32)
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
DEF_HELPER_3(ptest, void, env, i32, i32)
DEF_HELPER_3(pflush, void, env, i32, i32)
DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env)
DEF_HELPER_3(ptest, void, env, i32, i32)
DEF_HELPER_3(pflush, void, env, i32, i32)
DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env)
-#if defined(CONFIG_SOFTMMU)
- gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
-#else
+#if defined(CONFIG_USER_ONLY)
gen_exception(s, s->base.pc_next, EXCP_DEBUG);
gen_exception(s, s->base.pc_next, EXCP_DEBUG);
+#else
+ gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
tcg_gen_addi_i32(QREG_SP, src, 4);
}
tcg_gen_addi_i32(QREG_SP, src, 4);
}
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
DISAS_INSN(reset)
{
if (IS_USER(s)) {
DISAS_INSN(reset)
{
if (IS_USER(s)) {
DEST_EA(env, insn, OS_WORD, sr, NULL);
}
DEST_EA(env, insn, OS_WORD, sr, NULL);
}
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
DISAS_INSN(moves)
{
int opsize;
DISAS_INSN(moves)
{
int opsize;
/* Invalidate cache line. Implement as no-op. */
}
/* Invalidate cache line. Implement as no-op. */
}
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
DISAS_INSN(pflush)
{
TCGv opmode;
DISAS_INSN(pflush)
{
TCGv opmode;
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
DISAS_INSN(frestore)
{
TCGv addr;
DISAS_INSN(frestore)
{
TCGv addr;
BASE(bitop_im, 08c0, ffc0);
INSN(arith_im, 0a80, fff8, CF_ISA_A);
INSN(arith_im, 0a00, ff00, M68K);
BASE(bitop_im, 08c0, ffc0);
INSN(arith_im, 0a80, fff8, CF_ISA_A);
INSN(arith_im, 0a00, ff00, M68K);
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
INSN(moves, 0e00, ff00, M68K);
#endif
INSN(cas, 0ac0, ffc0, CAS);
INSN(moves, 0e00, ff00, M68K);
#endif
INSN(cas, 0ac0, ffc0, CAS);
BASE(move_to_ccr, 44c0, ffc0);
INSN(not, 4680, fff8, CF_ISA_A);
INSN(not, 4600, ff00, M68K);
BASE(move_to_ccr, 44c0, ffc0);
INSN(not, 4680, fff8, CF_ISA_A);
INSN(not, 4600, ff00, M68K);
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
BASE(move_to_sr, 46c0, ffc0);
#endif
INSN(nbcd, 4800, ffc0, M68K);
BASE(move_to_sr, 46c0, ffc0);
#endif
INSN(nbcd, 4800, ffc0, M68K);
BASE(tst, 4a00, ff00);
INSN(tas, 4ac0, ffc0, CF_ISA_B);
INSN(tas, 4ac0, ffc0, M68K);
BASE(tst, 4a00, ff00);
INSN(tas, 4ac0, ffc0, CF_ISA_B);
INSN(tas, 4ac0, ffc0, M68K);
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
INSN(halt, 4ac8, ffff, CF_ISA_A);
INSN(halt, 4ac8, ffff, M68K);
#endif
INSN(halt, 4ac8, ffff, CF_ISA_A);
INSN(halt, 4ac8, ffff, M68K);
#endif
BASE(trap, 4e40, fff0);
BASE(link, 4e50, fff8);
BASE(unlk, 4e58, fff8);
BASE(trap, 4e40, fff0);
BASE(link, 4e50, fff8);
BASE(unlk, 4e58, fff8);
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
INSN(move_to_usp, 4e60, fff8, USP);
INSN(move_from_usp, 4e68, fff8, USP);
INSN(reset, 4e70, ffff, M68K);
INSN(move_to_usp, 4e60, fff8, USP);
INSN(move_from_usp, 4e68, fff8, USP);
INSN(reset, 4e70, ffff, M68K);
INSN(ftrapcc, f27a, fffe, FPU); /* opmode 010, 011 */
INSN(ftrapcc, f27c, ffff, FPU); /* opmode 100 */
INSN(fbcc, f280, ff80, FPU);
INSN(ftrapcc, f27a, fffe, FPU); /* opmode 010, 011 */
INSN(ftrapcc, f27c, ffff, FPU); /* opmode 100 */
INSN(fbcc, f280, ff80, FPU);
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
INSN(frestore, f340, ffc0, CF_FPU);
INSN(fsave, f300, ffc0, CF_FPU);
INSN(frestore, f340, ffc0, FPU);
INSN(frestore, f340, ffc0, CF_FPU);
INSN(fsave, f300, ffc0, CF_FPU);
INSN(frestore, f340, ffc0, FPU);
break;
}
qemu_fprintf(f, "\n");
break;
}
qemu_fprintf(f, "\n");
+#ifndef CONFIG_USER_ONLY
qemu_fprintf(f, "%sA7(MSP) = %08x %sA7(USP) = %08x %sA7(ISP) = %08x\n",
env->current_sp == M68K_SSP ? "->" : " ", env->sp[M68K_SSP],
env->current_sp == M68K_USP ? "->" : " ", env->sp[M68K_USP],
qemu_fprintf(f, "%sA7(MSP) = %08x %sA7(USP) = %08x %sA7(ISP) = %08x\n",
env->current_sp == M68K_SSP ? "->" : " ", env->sp[M68K_SSP],
env->current_sp == M68K_USP ? "->" : " ", env->sp[M68K_USP],
env->mmu.ttr[M68K_ITTR0], env->mmu.ttr[M68K_ITTR1]);
qemu_fprintf(f, "MMUSR %08x, fault at %08x\n",
env->mmu.mmusr, env->mmu.ar);
env->mmu.ttr[M68K_ITTR0], env->mmu.ttr[M68K_ITTR1]);
qemu_fprintf(f, "MMUSR %08x, fault at %08x\n",
env->mmu.mmusr, env->mmu.ar);
+#endif /* !CONFIG_USER_ONLY */