// SPDX-License-Identifier: GPL-2.0+
/*
- * AD5672R, AD5676, AD5676R, AD5684, AD5684R, AD5684R, AD5685R, AD5686, AD5686R
+ * AD5672R, AD5676, AD5676R, AD5681R, AD5682R, AD5683, AD5683R,
+ * AD5684, AD5684R, AD5685R, AD5686, AD5686R
* Digital to analog converters driver
*
* Copyright 2018 Analog Devices Inc.
u8 cmd, u8 addr, u16 val)
{
struct spi_device *spi = to_spi_device(st->dev);
-
- st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
- AD5686_ADDR(addr) |
- val);
-
- return spi_write(spi, &st->data[0].d8[1], 3);
+ u8 tx_len, *buf;
+
+ switch (st->chip_info->regmap_type) {
+ case AD5683_REGMAP:
+ st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
+ AD5683_DATA(val));
+ buf = &st->data[0].d8[1];
+ tx_len = 3;
+ break;
+ case AD5686_REGMAP:
+ st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
+ AD5686_ADDR(addr) |
+ val);
+ buf = &st->data[0].d8[1];
+ tx_len = 3;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return spi_write(spi, buf, tx_len);
}
static int ad5686_spi_read(struct ad5686_state *st, u8 addr)
},
};
struct spi_device *spi = to_spi_device(st->dev);
+ u8 cmd = 0;
int ret;
- st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) |
+ if (st->chip_info->regmap_type == AD5686_REGMAP)
+ cmd = AD5686_CMD_READBACK_ENABLE;
+ else if (st->chip_info->regmap_type == AD5683_REGMAP)
+ cmd = AD5686_CMD_READBACK_ENABLE_V2;
+
+ st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
AD5686_ADDR(addr));
st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP));
{"ad5672r", ID_AD5672R},
{"ad5676", ID_AD5676},
{"ad5676r", ID_AD5676R},
+ {"ad5681r", ID_AD5681R},
+ {"ad5682r", ID_AD5682R},
+ {"ad5683", ID_AD5683},
+ {"ad5683r", ID_AD5683R},
{"ad5684", ID_AD5684},
{"ad5684r", ID_AD5684R},
{"ad5685", ID_AD5685R}, /* Does not exist */
st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
switch (st->chip_info->regmap_type) {
+ case AD5683_REGMAP:
+ shift = 13;
+ ref_bit_msk = AD5683_REF_BIT_MSK;
+ break;
case AD5686_REGMAP:
shift = 0;
ref_bit_msk = 0;
.num_channels = 8,
.regmap_type = AD5686_REGMAP,
},
+ [ID_AD5681R] = {
+ .channels = ad5691r_channels,
+ .int_vref_mv = 2500,
+ .num_channels = 1,
+ .regmap_type = AD5683_REGMAP,
+ },
+ [ID_AD5682R] = {
+ .channels = ad5692r_channels,
+ .int_vref_mv = 2500,
+ .num_channels = 1,
+ .regmap_type = AD5683_REGMAP,
+ },
+ [ID_AD5683] = {
+ .channels = ad5693_channels,
+ .num_channels = 1,
+ .regmap_type = AD5683_REGMAP,
+ },
+ [ID_AD5683R] = {
+ .channels = ad5693_channels,
+ .int_vref_mv = 2500,
+ .num_channels = 1,
+ .regmap_type = AD5683_REGMAP,
+ },
[ID_AD5684] = {
.channels = ad5684_channels,
.num_channels = 4,
indio_dev->num_channels = st->chip_info->num_channels;
switch (st->chip_info->regmap_type) {
+ case AD5683_REGMAP:
+ cmd = AD5686_CMD_CONTROL_REG;
+ ref_bit_msk = AD5683_REF_BIT_MSK;
+ st->use_internal_vref = !voltage_uv;
+ break;
case AD5686_REGMAP:
cmd = AD5686_CMD_INTERNAL_REFER_SETUP;
ref_bit_msk = 0;
#include <linux/mutex.h>
#include <linux/kernel.h>
+#define AD5683_DATA(x) ((x) << 4)
#define AD5686_ADDR(x) ((x) << 16)
#define AD5686_CMD(x) ((x) << 20)
#define AD5686_LDAC_PWRDN_3STATE 0x3
#define AD5686_CMD_CONTROL_REG 0x4
+#define AD5686_CMD_READBACK_ENABLE_V2 0x5
+#define AD5683_REF_BIT_MSK BIT(12)
#define AD5693_REF_BIT_MSK BIT(12)
/**
ID_AD5675R,
ID_AD5676,
ID_AD5676R,
+ ID_AD5681R,
+ ID_AD5682R,
+ ID_AD5683,
+ ID_AD5683R,
ID_AD5684,
ID_AD5684R,
ID_AD5685R,
};
enum ad5686_regmap_type {
+ AD5683_REGMAP,
AD5686_REGMAP,
AD5693_REGMAP
};