return;
}
- base_addr = NRF51_TIMER_BASE + i * NRF51_TIMER_SIZE;
+ base_addr = NRF51_TIMER_BASE + i * NRF51_PERIPHERAL_SIZE;
sysbus_mmio_map(SYS_BUS_DEVICE(&s->timer[i]), 0, base_addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer[i]), 0,
/* STUB Peripherals */
memory_region_init_io(&s->clock, OBJECT(dev_soc), &clock_ops, NULL,
- "nrf51_soc.clock", 0x1000);
+ "nrf51_soc.clock", NRF51_PERIPHERAL_SIZE);
memory_region_add_subregion_overlap(&s->container,
NRF51_IOMEM_BASE, &s->clock, -1);
MicrobitI2CState *s = MICROBIT_I2C(dev);
memory_region_init_io(&s->iomem, OBJECT(s), µbit_i2c_ops, s,
- "microbit.twi", NRF51_TWI_SIZE);
+ "microbit.twi", NRF51_PERIPHERAL_SIZE);
sysbus_init_mmio(sbd, &s->iomem);
}
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
memory_region_init_io(&s->iomem, obj, &rng_ops, s,
- TYPE_NRF51_TIMER, NRF51_TIMER_SIZE);
+ TYPE_NRF51_TIMER, NRF51_PERIPHERAL_SIZE);
sysbus_init_mmio(sbd, &s->iomem);
sysbus_init_irq(sbd, &s->irq);
#define NRF51_IOMEM_BASE 0x40000000
#define NRF51_IOMEM_SIZE 0x20000000
+#define NRF51_PERIPHERAL_SIZE 0x00001000
#define NRF51_UART_BASE 0x40002000
#define NRF51_TWI_BASE 0x40003000
-#define NRF51_TWI_SIZE 0x00001000
#define NRF51_TIMER_BASE 0x40008000
-#define NRF51_TIMER_SIZE 0x00001000
#define NRF51_RNG_BASE 0x4000D000
#define NRF51_NVMC_BASE 0x4001E000
#define NRF51_GPIO_BASE 0x50000000
#define MICROBIT_I2C(obj) \
OBJECT_CHECK(MicrobitI2CState, (obj), TYPE_MICROBIT_I2C)
-#define MICROBIT_I2C_NREGS (NRF51_TWI_SIZE / sizeof(uint32_t))
+#define MICROBIT_I2C_NREGS (NRF51_PERIPHERAL_SIZE / sizeof(uint32_t))
typedef struct {
SysBusDevice parent_obj;