]> git.proxmox.com Git - mirror_qemu.git/commitdiff
target/arm: Enable FEAT_CSV2 for -cpu max
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 6 May 2022 18:02:37 +0000 (13:02 -0500)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 9 May 2022 10:47:54 +0000 (11:47 +0100)
This extension concerns branch speculation, which TCG does
not implement.  Thus we can trivially enable this feature.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
docs/system/arm/emulation.rst
target/arm/cpu64.c
target/arm/cpu_tcg.c

index b200012d89bfda6780ba0f486eb4eec618507cd0..b2a3e2a43739005072a1a845fbe7854f3ba37c8d 100644 (file)
@@ -12,6 +12,7 @@ the following architecture extensions:
 - FEAT_BBM at level 2 (Translation table break-before-make levels)
 - FEAT_BF16 (AArch64 BFloat16 instructions)
 - FEAT_BTI (Branch Target Identification)
+- FEAT_CSV2 (Cache speculation variant 2)
 - FEAT_DIT (Data Independent Timing instructions)
 - FEAT_DPB (DC CVAP instruction)
 - FEAT_Debugv8p2 (Debug changes for v8.2)
index 10410619f9099ffe3d193048bde05a6c717f7098..25fe74f928bbf68dc027b200cd6c63b46724fc95 100644 (file)
@@ -748,6 +748,7 @@ static void aarch64_max_initfn(Object *obj)
     t = FIELD_DP64(t, ID_AA64PFR0, SVE, 1);
     t = FIELD_DP64(t, ID_AA64PFR0, SEL2, 1);      /* FEAT_SEL2 */
     t = FIELD_DP64(t, ID_AA64PFR0, DIT, 1);       /* FEAT_DIT */
+    t = FIELD_DP64(t, ID_AA64PFR0, CSV2, 1);      /* FEAT_CSV2 */
     cpu->isar.id_aa64pfr0 = t;
 
     t = cpu->isar.id_aa64pfr1;
index c5cf7efe95c0f1022be037697aabd096e2d34eac..762b9617073900aab4ea1233a91c9ac5a0c66d20 100644 (file)
@@ -68,6 +68,7 @@ void aa32_max_features(ARMCPU *cpu)
     cpu->isar.id_mmfr4 = t;
 
     t = cpu->isar.id_pfr0;
+    t = FIELD_DP32(t, ID_PFR0, CSV2, 2);          /* FEAT_CVS2 */
     t = FIELD_DP32(t, ID_PFR0, DIT, 1);           /* FEAT_DIT */
     t = FIELD_DP32(t, ID_PFR0, RAS, 1);           /* FEAT_RAS */
     cpu->isar.id_pfr0 = t;