powerpc/bpf: use unsigned division instruction for 64-bit operations

BPF_ALU64 div/mod operations are currently using signed division, unlike
BPF_ALU32 operations. Fix the same. DIV64 and MOD64 overflow tests pass
with this fix.

Fixes: 156d0e290e969c ("powerpc/ebpf/jit: Implement JIT compiler for extended BPF")
Cc: stable@vger.kernel.org # v4.8+
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>

diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 493c5c943acd02a2b5f9d894cbe2b3ec1cd562a9..2291daf39cd1500c196a88ae93577900e8ef113c 100644 (file)
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -338,6 +338,7 @@
 #define PPC_INST_MADDLD                        0x10000033
 #define PPC_INST_DIVWU                 0x7c000396
 #define PPC_INST_DIVD                  0x7c0003d2
+#define PPC_INST_DIVDU                 0x7c000392
 #define PPC_INST_RLWINM                        0x54000000
 #define PPC_INST_RLWINM_DOT            0x54000001
 #define PPC_INST_RLWIMI                        0x50000000

diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index dcac37745b05cfcc70b89fafcda172e3406956a0..1e932898d430c3f2545a2fdf429324b35fff3d27 100644 (file)
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -116,7 +116,7 @@
                                     ___PPC_RA(a) | IMM_L(i))
 #define PPC_DIVWU(d, a, b)     EMIT(PPC_INST_DIVWU | ___PPC_RT(d) |          \
                                     ___PPC_RA(a) | ___PPC_RB(b))
-#define PPC_DIVD(d, a, b)      EMIT(PPC_INST_DIVD | ___PPC_RT(d) |           \
+#define PPC_DIVDU(d, a, b)     EMIT(PPC_INST_DIVDU | ___PPC_RT(d) |          \
                                     ___PPC_RA(a) | ___PPC_RB(b))
 #define PPC_AND(d, a, b)       EMIT(PPC_INST_AND | ___PPC_RA(d) |            \
                                     ___PPC_RS(a) | ___PPC_RB(b))

diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c
index 21a1dcd4b156c4bc926eccd5bd2375383a7705d2..e3fedeffe40f06896333f9cf999580adf06e218c 100644 (file)
--- a/arch/powerpc/net/bpf_jit_comp64.c
+++ b/arch/powerpc/net/bpf_jit_comp64.c
@@ -399,12 +399,12 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
                case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */
                case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */
                        if (BPF_OP(code) == BPF_MOD) {
-                               PPC_DIVD(b2p[TMP_REG_1], dst_reg, src_reg);
+                               PPC_DIVDU(b2p[TMP_REG_1], dst_reg, src_reg);
                                PPC_MULD(b2p[TMP_REG_1], src_reg,
                                                b2p[TMP_REG_1]);
                                PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]);
                        } else
-                               PPC_DIVD(dst_reg, dst_reg, src_reg);
+                               PPC_DIVDU(dst_reg, dst_reg, src_reg);
                        break;
                case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */
                case BPF_ALU | BPF_DIV | BPF_K: /* (u32) dst /= (u32) imm */
@@ -432,7 +432,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
                                break;
                        case BPF_ALU64:
                                if (BPF_OP(code) == BPF_MOD) {
-                                       PPC_DIVD(b2p[TMP_REG_2], dst_reg,
+                                       PPC_DIVDU(b2p[TMP_REG_2], dst_reg,
                                                        b2p[TMP_REG_1]);
                                        PPC_MULD(b2p[TMP_REG_1],
                                                        b2p[TMP_REG_1],
@@ -440,7 +440,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
                                        PPC_SUB(dst_reg, dst_reg,
                                                        b2p[TMP_REG_1]);
                                } else
-                                       PPC_DIVD(dst_reg, dst_reg,
+                                       PPC_DIVDU(dst_reg, dst_reg,
                                                        b2p[TMP_REG_1]);
                                break;
                        }