drm/amdgpu/jpeg5: add power gating support

Add PG support for JPEG5

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
index fbc987e299f81737c2fd5dc4cb6e020925d68b3b..71c28cc066054aa25b4a65c9bcc4e243dc528ed6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
@@ -261,6 +261,14 @@ static int jpeg_v5_0_0_enable_static_power_gating(struct amdgpu_device *adev)
                UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK,
                ~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);
 
+       if (adev->pg_flags & AMD_PG_SUPPORT_JPEG) {
+               WREG32(SOC15_REG_OFFSET(JPEG, 0, regUVD_IPX_DLDO_CONFIG),
+                       2 << UVD_IPX_DLDO_CONFIG__ONO1_PWR_CONFIG__SHIFT);
+               SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_IPX_DLDO_STATUS,
+                       1 << UVD_IPX_DLDO_STATUS__ONO1_PWR_STATUS__SHIFT,
+                       UVD_IPX_DLDO_STATUS__ONO1_PWR_STATUS_MASK);
+       }
+
        return 0;
 }