drm/i915: Be careful with non-disp bit in PMINTRMSK

Bit 31 in GEN6_PMINTRMSK is not an interrupt disable bit with gen8.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6e6ade902d7e323f637ef124cfa355c96267de7b..15eb29cd3ee382fd8b5e083df7d2e85534313326 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3253,7 +3253,7 @@ static void gen8_disable_rps_interrupts(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
 
-       I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);
+       I915_WRITE(GEN6_PMINTRMSK, ~GEN8_PMINTR_REDIRECT_TO_NON_DISP);
        I915_WRITE(GEN8_GT_IER(2), I915_READ(GEN8_GT_IER(2)) &
                                   ~dev_priv->pm_rps_events);
        /* Complete PM interrupt masking here doesn't race with the rps work