drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs are enabled

Only init / reset the display interrupts during power well enabling /
disabling if the i915 interrupts are enabled. So far we did the
init / reset during driver loading / resuming too, where
initialization / enabling of the i915 interrupts happens only at a later
point. This didn't cause a problem due to GEN8_MASTER_IRQ_CONTROL being
cleared, but triggered gen3_assert_iir_is_zero() in GEN8_IRQ_INIT_NDX().

References: https://bugs.freedesktop.org/show_bug.cgi?id=102988
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20170928100624.15533-1-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index efd7827ff18120cd39fbb876796699c281b6751b..e5997e81867365c493a320b41cbead5944e3efcf 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3163,10 +3163,17 @@ void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
        enum pipe pipe;
 
        spin_lock_irq(&dev_priv->irq_lock);
+
+       if (!intel_irqs_enabled(dev_priv)) {
+               spin_unlock_irq(&dev_priv->irq_lock);
+               return;
+       }
+
        for_each_pipe_masked(dev_priv, pipe, pipe_mask)
                GEN8_IRQ_INIT_NDX(DE_PIPE, pipe,
                                  dev_priv->de_irq_mask[pipe],
                                  ~dev_priv->de_irq_mask[pipe] | extra_ier);
+
        spin_unlock_irq(&dev_priv->irq_lock);
 }
 
@@ -3176,8 +3183,15 @@ void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv,
        enum pipe pipe;
 
        spin_lock_irq(&dev_priv->irq_lock);
+
+       if (!intel_irqs_enabled(dev_priv)) {
+               spin_unlock_irq(&dev_priv->irq_lock);
+               return;
+       }
+
        for_each_pipe_masked(dev_priv, pipe, pipe_mask)
                GEN8_IRQ_RESET_NDX(DE_PIPE, pipe);
+
        spin_unlock_irq(&dev_priv->irq_lock);
 
        /* make sure we're done processing display irqs */