for (i = 0; i < MAX_PIPES; i++) {
struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
- if (pipe_ctx->stream == stream) {
+ if ((pipe_ctx->stream == stream) &&
+ (pipe_ctx->ipp != NULL)) {
struct input_pixel_processor *ipp = pipe_ctx->ipp;
if (ipp->funcs->ipp_cursor_set_attributes(
for (i = 0; i < MAX_PIPES; i++) {
struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
- if (pipe_ctx->stream == stream) {
+ if ((pipe_ctx->stream == stream) &&
+ (pipe_ctx->ipp != NULL)) {
struct input_pixel_processor *ipp = pipe_ctx->ipp;
struct dc_cursor_mi_param param = {
.pixel_clk_khz = dc_stream->timing.pix_clk_khz,
opp110->base.inst = inst;
+ opp110->base.regamma_params = dm_alloc(sizeof(struct pwl_params));
+ if (opp110->base.regamma_params == NULL)
+ return false;
+
opp110->regs = regs;
opp110->opp_shift = opp_shift;
opp110->opp_mask = opp_mask;
void dce110_opp_destroy(struct output_pixel_processor **opp)
{
+ dm_free((*opp)->regamma_params);
+ (*opp)->regamma_params = NULL;
+
dm_free(FROM_DCE11_OPP(*opp));
*opp = NULL;
}
const struct core_stream *stream)
{
struct output_pixel_processor *opp = pipe_ctx->opp;
- const struct core_gamma *ramp = NULL;
- struct pwl_params *regamma_params;
- bool result = false;
-
- if (surface->public.gamma_correction)
- ramp = DC_GAMMA_TO_CORE(surface->public.gamma_correction);
-
- regamma_params = dm_alloc(sizeof(struct pwl_params));
- if (regamma_params == NULL)
- goto regamma_alloc_fail;
-
- regamma_params->hw_points_num = GAMMA_HW_POINTS_NUM;
opp->funcs->opp_power_on_regamma_lut(opp, true);
+ opp->regamma_params->hw_points_num = GAMMA_HW_POINTS_NUM;
if (stream->public.out_transfer_func &&
- stream->public.out_transfer_func->type ==
+ stream->public.out_transfer_func->type ==
TF_TYPE_PREDEFINED &&
- stream->public.out_transfer_func->tf ==
+ stream->public.out_transfer_func->tf ==
TRANSFER_FUNCTION_SRGB) {
opp->funcs->opp_set_regamma_mode(opp, OPP_REGAMMA_SRGB);
} else if (dce110_translate_regamma_to_hw_format(
- stream->public.out_transfer_func, regamma_params)) {
- opp->funcs->opp_program_regamma_pwl(opp, regamma_params);
- opp->funcs->opp_set_regamma_mode(opp, OPP_REGAMMA_USER);
+ stream->public.out_transfer_func, opp->regamma_params)) {
+ opp->funcs->opp_program_regamma_pwl(opp, opp->regamma_params);
+ opp->funcs->opp_set_regamma_mode(opp, OPP_REGAMMA_USER);
} else {
opp->funcs->opp_set_regamma_mode(opp, OPP_REGAMMA_BYPASS);
}
opp->funcs->opp_power_on_regamma_lut(opp, false);
- result = true;
-
- dm_free(regamma_params);
-
-regamma_alloc_fail:
- return result;
+ return true;
}
static enum dc_status bios_parser_crtc_source_select(
dm_write_reg(opp->ctx, mmDCFEV_MEM_PWR_CTRL, value);
}
+
+void dce110_opp_set_regamma_mode_v(
+ struct output_pixel_processor *opp,
+ enum opp_regamma mode)
+{
+ // TODO: need to implement the function
+}
.opp_set_csc_default = dce110_opp_v_set_csc_default,
.opp_set_csc_adjustment = dce110_opp_v_set_csc_adjustment,
.opp_set_dyn_expansion = dce110_opp_set_dyn_expansion,
- .opp_set_regamma_mode = dce110_opp_set_regamma_mode,
+ .opp_set_regamma_mode = dce110_opp_set_regamma_mode_v,
.opp_destroy = dce110_opp_destroy,
.opp_program_fmt = dce110_opp_program_fmt,
.opp_program_bit_depth_reduction =
opp110->base.ctx = ctx;
+ opp110->base.regamma_params = dm_alloc(sizeof(struct pwl_params));
+ if (opp110->base.regamma_params == NULL)
+ return false;
+
return true;
}
struct output_pixel_processor *opp,
bool power_on);
+void dce110_opp_set_regamma_mode_v(
+ struct output_pixel_processor *opp,
+ enum opp_regamma mode);
+
#endif /* __DC_OPP_DCE110_V_H__ */
dce110_resource_build_bit_depth_reduction_params
};
-static void underlay_create(struct dc_context *ctx, struct resource_pool *pool)
+static bool underlay_create(struct dc_context *ctx, struct resource_pool *pool)
{
struct dce110_timing_generator *dce110_tgv = dm_alloc(sizeof (*dce110_tgv));
struct dce_transform *dce110_xfmv = dm_alloc(sizeof (*dce110_xfmv));
struct dce110_mem_input *dce110_miv = dm_alloc(sizeof (*dce110_miv));
struct dce110_opp *dce110_oppv = dm_alloc(sizeof (*dce110_oppv));
- dce110_opp_v_construct(dce110_oppv, ctx);
+ if ((dce110_tgv == NULL) ||
+ (dce110_xfmv == NULL) ||
+ (dce110_miv == NULL) ||
+ (dce110_oppv == NULL))
+ return false;
+
+ if (!dce110_opp_v_construct(dce110_oppv, ctx))
+ return false;
+
dce110_timing_generator_v_construct(dce110_tgv, ctx);
dce110_mem_input_v_construct(dce110_miv, ctx);
dce110_transform_v_construct(dce110_xfmv, ctx);
/* update the public caps to indicate an underlay is available */
ctx->dc->caps.max_slave_planes = 1;
ctx->dc->caps.max_slave_planes = 1;
+
+ return true;
}
static void bw_calcs_data_update_from_pplib(struct core_dc *dc)
}
}
- underlay_create(ctx, &pool->base);
+ if (!underlay_create(ctx, &pool->base))
+ goto res_create_fail;
if (!resource_construct(num_virtual_links, dc, &pool->base,
&res_create_funcs))
};
struct pwl_params {
- uint32_t *data;
struct gamma_curve arr_curve_points[16];
struct curve_points arr_points[3];
struct pwl_result_data rgb_resulted[256 + 3];
struct output_pixel_processor {
struct dc_context *ctx;
uint32_t inst;
+ struct pwl_params *regamma_params;
const struct opp_funcs *funcs;
};