/* pflash_cfi02.c */
pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
- BlockDriverState *bs, target_ulong sector_len,
+ BlockDriverState *bs, uint32_t sector_len,
int nb_blocs, int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3);
if (*row & cols)
rows |= i;
- qemu_set_irq(s->kbd_irq, rows && ~s->kbd_mask && s->clk);
- s->row_latch = rows ^ 0x1f;
+ qemu_set_irq(s->kbd_irq, rows && !s->kbd_mask && s->clk);
+ s->row_latch = ~rows;
}
static uint32_t omap_mpuio_read(void *opaque, target_phys_addr_t addr)
return s->edge;
case 0x20: /* KBD_INT */
- return (s->row_latch != 0x1f) && !s->kbd_mask;
+ return (~s->row_latch & 0x1f) && !s->kbd_mask;
case 0x24: /* GPIO_INT */
ret = s->ints;
}
pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
- BlockDriverState *bs, target_ulong sector_len,
+ BlockDriverState *bs, uint32_t sector_len,
int nb_blocs, int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3)