arm64: dts: ti: k3-j721e-main: Add C66x DSP nodes

The J721E SoCs have two TMS320C66x DSP Core Subsystems (C66x CorePacs)
in the MAIN voltage domain, each with a C66x Fixed/Floating-Point DSP
Core, and 32 KB of L1P & L1D configurable SRAMs/Cache and an additional
288 KB of L2 configurable SRAM/Cache. These subsystems do not have
an MMU but contain a Region Address Translator (RAT) sub-module for
translating 32-bit processor addresses into larger bus addresses.
The inter-processor communication between the main A72 cores and
these processors is achieved through shared memory and Mailboxes.
Add the DT nodes for these DSP processor sub-systems in the common
k3-j721e-main.dtsi file.

The following firmware names are used by default for these cores, and
can be overridden in a board dts file if desired:
    C66x_0 DSP: j7-c66_0-fw
    C66x_1 DSP: j7-c66_1-fw

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20200825172145.13186-3-s-anna@ti.com

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 10f00d7a0c3b10ddc6040af474743f0761335576..52f3373e6d0f640a768621d9633ad9c0497eb4da 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1349,4 +1349,30 @@
                assigned-clocks = <&k3_clks 253 1>;
                assigned-clock-parents = <&k3_clks 253 5>;
        };
+
+       c66_0: dsp@4d80800000 {
+               compatible = "ti,j721e-c66-dsp";
+               reg = <0x4d 0x80800000 0x00 0x00048000>,
+                     <0x4d 0x80e00000 0x00 0x00008000>,
+                     <0x4d 0x80f00000 0x00 0x00008000>;
+               reg-names = "l2sram", "l1pram", "l1dram";
+               ti,sci = <&dmsc>;
+               ti,sci-dev-id = <142>;
+               ti,sci-proc-ids = <0x03 0xff>;
+               resets = <&k3_reset 142 1>;
+               firmware-name = "j7-c66_0-fw";
+       };
+
+       c66_1: dsp@4d81800000 {
+               compatible = "ti,j721e-c66-dsp";
+               reg = <0x4d 0x81800000 0x00 0x00048000>,
+                     <0x4d 0x81e00000 0x00 0x00008000>,
+                     <0x4d 0x81f00000 0x00 0x00008000>;
+               reg-names = "l2sram", "l1pram", "l1dram";
+               ti,sci = <&dmsc>;
+               ti,sci-dev-id = <143>;
+               ti,sci-proc-ids = <0x04 0xff>;
+               resets = <&k3_reset 143 1>;
+               firmware-name = "j7-c66_1-fw";
+       };
 };