From: Laszlo Ersek <lersek@redhat.com>
Date: Tue, 4 Jul 2017 11:16:39 +0000 (+0200)
Subject: OvmfPkg/SmmAccess: prepare for PcdQ35TsegMbytes becoming dynamic
X-Git-Tag: edk2-stable201903~3856
X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=1372f8d347abc9f69c6342a1e985ff400d171ac8;p=mirror_edk2.git

OvmfPkg/SmmAccess: prepare for PcdQ35TsegMbytes becoming dynamic

In one of the next patches we'll turn PcdQ35TsegMbytes into a dynamic PCD,
to be set by PlatformPei.

Jordan suggested to use gEfiPeiMemoryDiscoveredPpiGuid as SmmAccessPei's
DEPEX for making sure that PlatformPei sets the PCD before SmmAccessPei
consumes it. (PlatformPei installs the permanent PEI RAM.) Such a DEPEX is
supposed to mirror physical firmware, where anything related to SMRAM
cannot run before said platform's physical RAM is discovered (signaled by
the presence of gEfiPeiMemoryDiscoveredPpiGuid).

Introduce the InitQ35TsegMbytes() function and the "mQ35TsegMbytes" extern
variable to "SmramInternal.h" and "SmramInternal.c":

- Both SmmAccess modules (PEIM and DXE driver) are supposed to call
  InitQ35TsegMbytes() in their respective entry point functions, saving
  PcdQ35TsegMbytes into "mQ35TsegMbytes". This way dynamic PCD fetches can
  be kept out of PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member
  functions later (when we add support for extended TSEG size).

- We can thus replace the current PcdQ35TsegMbytes fetches in
  SmmAccessPei's entry point function as well, with reads from
  "mQ35TsegMbytes".

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
---

diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c b/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
index d5130399b0..0a99cc5e83 100644
--- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
+++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
@@ -149,6 +149,7 @@ SmmAccess2DxeEntryPoint (
   //
   ASSERT (FeaturePcdGet (PcdSmmSmramRequire));
 
+  InitQ35TsegMbytes ();
   GetStates (&mAccess2.LockState, &mAccess2.OpenState);
   return gBS->InstallMultipleProtocolInterfaces (&ImageHandle,
                 &gEfiSmmAccess2ProtocolGuid, &mAccess2,
diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
index 31e4dfa029..1bc88fa050 100644
--- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
+++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
@@ -54,5 +54,8 @@
 [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
 
+[Pcd]
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
+
 [Depex]
   TRUE
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c
index 76790e330f..a3631a1b9d 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.c
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.c
@@ -318,8 +318,9 @@ SmmAccessPeiEntryPoint (
   //
   // Set TSEG Memory Base.
   //
+  InitQ35TsegMbytes ();
   PciWrite32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB),
-    (TopOfLowRamMb - FixedPcdGet16 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
+    (TopOfLowRamMb - mQ35TsegMbytes) << MCH_TSEGMB_MB_SHIFT);
 
   //
   // Set TSEG size, and disable TSEG visibility outside of SMM. Note that the
@@ -327,8 +328,8 @@ SmmAccessPeiEntryPoint (
   // *restricted* to SMM.
   //
   EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;
-  EsmramcVal |= FixedPcdGet16 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
-                FixedPcdGet16 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
+  EsmramcVal |= mQ35TsegMbytes == 8 ? MCH_ESMRAMC_TSEG_8MB :
+                mQ35TsegMbytes == 2 ? MCH_ESMRAMC_TSEG_2MB :
                 MCH_ESMRAMC_TSEG_1MB;
   EsmramcVal |= MCH_ESMRAMC_T_EN;
   PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.inf b/OvmfPkg/SmmAccess/SmmAccessPei.inf
index 3908b085da..09f3b63446 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.inf
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.inf
@@ -59,11 +59,11 @@
 [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
 
-[FixedPcd]
+[Pcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
 
 [Ppis]
   gPeiSmmAccessPpiGuid           ## PRODUCES
 
 [Depex]
-  TRUE
+  gEfiPeiMemoryDiscoveredPpiGuid
diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInternal.c
index c3267ca940..9918a45148 100644
--- a/OvmfPkg/SmmAccess/SmramInternal.c
+++ b/OvmfPkg/SmmAccess/SmramInternal.c
@@ -17,10 +17,27 @@
 #include <Guid/AcpiS3Context.h>
 #include <IndustryStandard/Q35MchIch9.h>
 #include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
 #include <Library/PciLib.h>
 
 #include "SmramInternal.h"
 
+//
+// The value of PcdQ35TsegMbytes is saved into this variable at module startup.
+//
+UINT16 mQ35TsegMbytes;
+
+/**
+  Save PcdQ35TsegMbytes into mQ35TsegMbytes.
+**/
+VOID
+InitQ35TsegMbytes (
+  VOID
+  )
+{
+  mQ35TsegMbytes = PcdGet16 (PcdQ35TsegMbytes);
+}
+
 /**
   Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and
   OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL object,
diff --git a/OvmfPkg/SmmAccess/SmramInternal.h b/OvmfPkg/SmmAccess/SmramInternal.h
index 4e9ac05fad..82b867cf88 100644
--- a/OvmfPkg/SmmAccess/SmramInternal.h
+++ b/OvmfPkg/SmmAccess/SmramInternal.h
@@ -31,6 +31,19 @@ typedef enum {
   DescIdxCount            = 2
 } DESCRIPTOR_INDEX;
 
+//
+// The value of PcdQ35TsegMbytes is saved into this variable at module startup.
+//
+extern UINT16 mQ35TsegMbytes;
+
+/**
+  Save PcdQ35TsegMbytes into mQ35TsegMbytes.
+**/
+VOID
+InitQ35TsegMbytes (
+  VOID
+  );
+
 /**
   Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and
   OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL object,