From: Gaetan Hug Date: Wed, 11 Mar 2015 12:08:12 +0000 (+0100) Subject: pwm: mxs: Fix period divider computation X-Git-Tag: Ubuntu-5.4-5.4.0-11.14~12403^2~2 X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=24ccea1ce6717b91bb1e71b12cfd956f8d32dcf3;p=mirror_ubuntu-focal-kernel.git pwm: mxs: Fix period divider computation The driver computes which clock divider it sould be using from the requested period. This computation assumes that the link between the register value and the actual divider value is raising 2 to the power of the registry value. div = 1 << regvalue This is true only for the first 5 values out of 8. Next values are 64, 256 and, 1024 - instead of 32, 64, 128. This affects only the users requesting a period > 0.04369s. Replace the computation with a look-up table. Signed-off-by: Gaetan Hug Acked-by: Shawn Guo Signed-off-by: Thierry Reding --- diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c index f75ecb09d97d..b430811e14f5 100644 --- a/drivers/pwm/pwm-mxs.c +++ b/drivers/pwm/pwm-mxs.c @@ -35,6 +35,10 @@ #define PERIOD_CDIV(div) (((div) & 0x7) << 20) #define PERIOD_CDIV_MAX 8 +static const unsigned int cdiv[PERIOD_CDIV_MAX] = { + 1, 2, 4, 8, 16, 64, 256, 1024 +}; + struct mxs_pwm_chip { struct pwm_chip chip; struct clk *clk; @@ -54,13 +58,13 @@ static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, rate = clk_get_rate(mxs->clk); while (1) { - c = rate / (1 << div); + c = rate / cdiv[div]; c = c * period_ns; do_div(c, 1000000000); if (c < PERIOD_PERIOD_MAX) break; div++; - if (div > PERIOD_CDIV_MAX) + if (div >= PERIOD_CDIV_MAX) return -EINVAL; }