From: Eric Dong <eric.dong@intel.com>
Date: Thu, 25 Oct 2018 01:49:35 +0000 (+0800)
Subject: UefiCpuPkg/CpuCommonFeaturesLib: Remove white space at line end.
X-Git-Tag: edk2-stable201903~709
X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=2b0c199465cacfe6406e0239952f274563376c71;hp=692e318d9d256aa3ab802b02f4dfba0eed5f2ee4;p=mirror_edk2.git

UefiCpuPkg/CpuCommonFeaturesLib: Remove white space at line end.

Remove extra white space at the end of line.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
---

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
index f8bee53819..57648352ec 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
@@ -328,7 +328,7 @@ LmceInitialize (
   MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;
 
   //
-  // The scope of FastStrings bit in the MSR_IA32_MISC_ENABLE is core for below processor type, only program 
+  // The scope of FastStrings bit in the MSR_IA32_MISC_ENABLE is core for below processor type, only program
   // MSR_IA32_MISC_ENABLE for thread 0 in each core.
   //
   if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||