From: Erwan Le Ray Date: Thu, 4 Mar 2021 16:23:05 +0000 (+0100) Subject: serial: stm32: fix FIFO flush in startup and set_termios X-Git-Tag: Ubuntu-5.11.0-19.20~493 X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=3d7836e51ddd54114a01623eb79b81e9c5f296a3;p=mirror_ubuntu-hirsute-kernel.git serial: stm32: fix FIFO flush in startup and set_termios BugLink: https://bugs.launchpad.net/bugs/1929455 [ Upstream commit 315e2d8a125ad77a1bc28f621162713f3e7aef48 ] Fifo flush set USART_RQR register by calling stm32_usart_set_bits routine (Read/Modify/Write). USART_RQR register is a write only register. So, read before write isn't correct / relevant to flush the FIFOs. Replace stm32_usart_set_bits call by writel_relaxed. Fixes: 84872dc448fe ("serial: stm32: add RX and TX FIFO flush") Signed-off-by: Erwan Le Ray Link: https://lore.kernel.org/r/20210304162308.8984-11-erwan.leray@foss.st.com Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sasha Levin Signed-off-by: Kamal Mostafa Signed-off-by: Kelsey Skunberg --- diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index a6295897c537..6788fb3af6cb 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -656,7 +656,7 @@ static int stm32_usart_startup(struct uart_port *port) /* RX FIFO Flush */ if (ofs->rqr != UNDEF_REG) - stm32_usart_set_bits(port, ofs->rqr, USART_RQR_RXFRQ); + writel_relaxed(USART_RQR_RXFRQ, port->membase + ofs->rqr); /* RX enabling */ val = stm32_port->cr1_irq | USART_CR1_RE | BIT(cfg->uart_enable_bit); @@ -760,8 +760,8 @@ static void stm32_usart_set_termios(struct uart_port *port, /* flush RX & TX FIFO */ if (ofs->rqr != UNDEF_REG) - stm32_usart_set_bits(port, ofs->rqr, - USART_RQR_TXFRQ | USART_RQR_RXFRQ); + writel_relaxed(USART_RQR_TXFRQ | USART_RQR_RXFRQ, + port->membase + ofs->rqr); cr1 = USART_CR1_TE | USART_CR1_RE; if (stm32_port->fifoen)