From: Tian Feng <feng.tian@intel.com>
Date: Tue, 24 Nov 2015 08:45:44 +0000 (+0800)
Subject: MdeModulePkg/NvmExpress: Clean Phase/CqHdbl/SqTdbl fields to restart HC
X-Git-Tag: edk2-stable201903~7248
X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=6523ae8baa91aea55ebcfb0d4ac056eb1962b723;p=mirror_edk2.git

MdeModulePkg/NvmExpress: Clean Phase/CqHdbl/SqTdbl fields to restart HC

Phase Tag, SqTdbl/CqHdbl and SqBuffer/CqBuffer should be cleared in
NvmeControllerInit() to make HC functionality work when user invokes
NvmeBlockIoReset().

Cc: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
---

diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
index 49a73c4f91..321dbdef97 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
@@ -770,7 +770,6 @@ NvmExpressDriverBindingStart (
     }
 
     Private->BufferPciAddr = (UINT8 *)(UINTN)MappedAddr;
-    ZeroMem (Private->Buffer, EFI_PAGES_TO_SIZE (4));
 
     Private->Signature = NVME_CONTROLLER_PRIVATE_DATA_SIGNATURE;
     Private->ControllerHandle          = Controller;
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
index 009ad7c43d..e2201b9cef 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
@@ -844,6 +844,12 @@ NvmeControllerInit (
 
   Private->Cid[0] = 0;
   Private->Cid[1] = 0;
+  Private->Pt[0]  = 0;
+  Private->Pt[1]  = 0;
+  Private->SqTdbl[0].Sqt = 0;
+  Private->SqTdbl[1].Sqt = 0;
+  Private->CqHdbl[0].Cqh = 0;
+  Private->CqHdbl[1].Cqh = 0;
 
   Status = NvmeDisableController (Private);
 
@@ -872,6 +878,7 @@ NvmeControllerInit (
   //
   // Address of I/O submission & completion queue.
   //
+  ZeroMem (Private->Buffer, EFI_PAGES_TO_SIZE (4));
   Private->SqBuffer[0]        = (NVME_SQ *)(UINTN)(Private->Buffer);
   Private->SqBufferPciAddr[0] = (NVME_SQ *)(UINTN)(Private->BufferPciAddr);
   Private->CqBuffer[0]        = (NVME_CQ *)(UINTN)(Private->Buffer + 1 * EFI_PAGE_SIZE);
@@ -924,10 +931,12 @@ NvmeControllerInit (
   //
   // Allocate buffer for Identify Controller data
   //
-  Private->ControllerData = (NVME_ADMIN_CONTROLLER_DATA *)AllocateZeroPool (sizeof(NVME_ADMIN_CONTROLLER_DATA));
-
   if (Private->ControllerData == NULL) {
-    return EFI_OUT_OF_RESOURCES;
+    Private->ControllerData = (NVME_ADMIN_CONTROLLER_DATA *)AllocateZeroPool (sizeof(NVME_ADMIN_CONTROLLER_DATA));
+    
+    if (Private->ControllerData == NULL) {
+      return EFI_OUT_OF_RESOURCES;
+    }
   }
 
   //