From: Simon Horman Date: Tue, 8 Oct 2013 01:01:47 +0000 (+0900) Subject: Merge branch 'heads/soc2' into boards2-base X-Git-Tag: Ubuntu-snapdragon-4.4.0-1050.54~11450^2~3^2~14 X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=661a7335c4e47726df1e7264580209847509569a;p=mirror_ubuntu-artful-kernel.git Merge branch 'heads/soc2' into boards2-base Conflicts: arch/arm/mach-shmobile/board-lager.c --- 661a7335c4e47726df1e7264580209847509569a diff --cc arch/arm/mach-shmobile/board-lager.c index 59951340b558,4e040e4d1102..32183a39354b --- a/arch/arm/mach-shmobile/board-lager.c +++ b/arch/arm/mach-shmobile/board-lager.c @@@ -28,8 -28,8 +28,9 @@@ #include #include #include +#include #include + #include #include #include #include @@@ -219,10 -154,32 +220,34 @@@ static void __init lager_add_standard_d ether_resources, ARRAY_SIZE(ether_resources), ðer_pdata, sizeof(ether_pdata)); + + lager_add_du_device(); } + /* + * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds + * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits + * 14-15. We have to set them back to 01 from the default 00 value each time + * the PHY is reset. It's also important because the PHY's LED0 signal is + * connected to SoC's ETH_LINK signal and in the PHY's default mode it will + * bounce on and off after each packet, which we apparently want to avoid. + */ + static int lager_ksz8041_fixup(struct phy_device *phydev) + { + u16 phyctrl1 = phy_read(phydev, 0x1e); + + phyctrl1 &= ~0xc000; + phyctrl1 |= 0x4000; + return phy_write(phydev, 0x1e, phyctrl1); + } + + static void __init lager_init(void) + { + lager_add_standard_devices(); + + phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup); + } + static const char *lager_boards_compat_dt[] __initdata = { "renesas,lager", NULL,