From: malc <malc@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Wed, 10 Dec 2008 19:18:40 +0000 (+0000)
Subject: Introduce and use cache-utils.[ch]
X-Git-Tag: release_0_10_0~713
X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=902b3d5c392bb6f48ef340ad8ecc3311705d2800;p=qemu.git

Introduce and use cache-utils.[ch]

Thanks to Segher Boessenkool and Holis Blanchard.

AIX and Darwin cache inquiry:
http://gcc.gnu.org/ml/gcc-patches/2007-08/msg00388.html

Auxiliary vectors:
http://manugarg.googlepages.com/aboutelfauxiliaryvectors

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5973 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/Makefile b/Makefile
index 51a801c24..a2a03ec3e 100644
--- a/Makefile
+++ b/Makefile
@@ -79,7 +79,7 @@ OBJS+=usb-serial.o usb-net.o
 OBJS+=sd.o ssi-sd.o
 OBJS+=bt.o bt-host.o bt-vhci.o bt-l2cap.o bt-sdp.o bt-hci.o bt-hid.o usb-bt.o
 OBJS+=buffered_file.o migration.o migration-tcp.o net.o qemu-sockets.o
-OBJS+=qemu-char.o aio.o net-checksum.o savevm.o
+OBJS+=qemu-char.o aio.o net-checksum.o savevm.o cache-utils.o
 
 ifdef CONFIG_BRLAPI
 OBJS+= baum.o
@@ -178,7 +178,7 @@ libqemu_common.a: $(OBJS)
 
 #######################################################################
 # USER_OBJS is code used by qemu userspace emulation
-USER_OBJS=cutils.o
+USER_OBJS=cutils.o  cache-utils.o
 
 libqemu_user.a: $(USER_OBJS)
 	rm -f $@ 
diff --git a/cache-utils.c b/cache-utils.c
new file mode 100644
index 000000000..0b4a5acb8
--- /dev/null
+++ b/cache-utils.c
@@ -0,0 +1,68 @@
+#include "cache-utils.h"
+
+#ifdef __powerpc__
+struct qemu_cache_conf qemu_cache_conf = {
+    .dcache_bsize = 16,
+    .icache_bsize = 16
+};
+
+#if defined _AIX
+#include <sys/systemcfg.h>
+
+static void ppc_init_cacheline_sizes(void)
+{
+    qemu_cache_conf.icache_bsize = _system_configuration.icache_line;
+    qemu_cache_conf.dcache_bsize = _system_configuration.dcache_line;
+}
+
+#elif defined __linux__
+#include <linux/auxvec.h>
+
+static void ppc_init_cacheline_sizes(char **envp)
+{
+    unsigned long *auxv;
+
+    while (*envp++);
+
+    for (auxv = (unsigned long *) envp; *auxv != AT_NULL; auxv += 2) {
+        switch (*auxv) {
+        case AT_DCACHEBSIZE: qemu_cache_conf.dcache_bsize = auxv[1]; break;
+        case AT_ICACHEBSIZE: qemu_cache_conf.icache_bsize = auxv[1]; break;
+        default: break;
+        }
+    }
+}
+
+#elif defined __APPLE__
+#include <sys/types.h>
+#include <sys/sysctl.h>
+
+static void ppc_init_cacheline_sizes(void)
+{
+    size_t len;
+    unsigned cacheline;
+    int name[2] = { CTL_HW, HW_CACHELINE };
+
+    if (sysctl(name, 2, &cacheline, &len, NULL, 0)) {
+        perror("sysctl CTL_HW HW_CACHELINE failed");
+    } else {
+        qemu_cache_conf.dcache_bsize = cacheline;
+        qemu_cache_conf.icache_bsize = cacheline;
+    }
+}
+#endif
+
+#ifdef __linux__
+void qemu_cache_utils_init(char **envp)
+{
+    ppc_init_cacheline_sizes(envp);
+}
+#else
+void qemu_cache_utils_init(char **envp)
+{
+    (void) envp;
+    ppc_init_cacheline_sizes();
+}
+#endif
+
+#endif /* __powerpc__ */
diff --git a/cache-utils.h b/cache-utils.h
new file mode 100644
index 000000000..0598b96eb
--- /dev/null
+++ b/cache-utils.h
@@ -0,0 +1,41 @@
+#ifndef QEMU_CACHE_UTILS_H
+#define QEMU_CACHE_UTILS_H
+
+#ifdef __powerpc__
+struct qemu_cache_conf {
+    unsigned long dcache_bsize;
+    unsigned long icache_bsize;
+};
+
+extern struct qemu_cache_conf qemu_cache_conf;
+
+extern void qemu_cache_utils_init(char **envp);
+
+/* mildly adjusted code from tcg-dyngen.c */
+static inline void flush_icache_range(unsigned long start, unsigned long stop)
+{
+    unsigned long p, start1, stop1;
+    unsigned long dsize = qemu_cache_conf.dcache_bsize;
+    unsigned long isize = qemu_cache_conf.icache_bsize;
+
+    start1 = start & ~(dsize - 1);
+    stop1 = (stop + dsize - 1) & ~(dsize - 1);
+    for (p = start1; p < stop1; p += dsize) {
+        asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
+    }
+    asm volatile ("sync" : : : "memory");
+
+    start &= start & ~(isize - 1);
+    stop1 = (stop + isize - 1) & ~(isize - 1);
+    for (p = start1; p < stop1; p += isize) {
+        asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
+    }
+    asm volatile ("sync" : : : "memory");
+    asm volatile ("isync" : : : "memory");
+}
+
+#else
+#define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)
+#endif
+
+#endif /* QEMU_CACHE_UTILS_H */
diff --git a/linux-user/main.c b/linux-user/main.c
index 66be10761..52322d4a7 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -27,6 +27,7 @@
 
 #include "qemu.h"
 #include "qemu-common.h"
+#include "cache-utils.h"
 /* For tb_lock */
 #include "exec-all.h"
 
@@ -2214,7 +2215,7 @@ void init_task_state(TaskState *ts)
     ts->sigqueue_table[i].next = NULL;
 }
  
-int main(int argc, char **argv)
+int main(int argc, char **argv, char **envp)
 {
     const char *filename;
     const char *cpu_model;
@@ -2231,6 +2232,8 @@ int main(int argc, char **argv)
     if (argc <= 1)
         usage();
 
+    qemu_cache_utils_init(envp);
+
     /* init debug */
     cpu_set_log_filename(DEBUG_LOGFILE);
 
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index 1bc1dc382..551df9ec9 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -86,24 +86,3 @@ enum {
 #define TCG_AREG1 TCG_REG_R24
 #define TCG_AREG2 TCG_REG_R25
 #define TCG_AREG3 TCG_REG_R26
-
-/* taken directly from tcg-dyngen.c */
-#define MIN_CACHE_LINE_SIZE 8 /* conservative value */
-
-static inline void flush_icache_range(unsigned long start, unsigned long stop)
-{
-    unsigned long p;
-
-    start &= ~(MIN_CACHE_LINE_SIZE - 1);
-    stop = (stop + MIN_CACHE_LINE_SIZE - 1) & ~(MIN_CACHE_LINE_SIZE - 1);
-
-    for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
-        asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
-    }
-    asm volatile ("sync" : : : "memory");
-    for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
-        asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
-    }
-    asm volatile ("sync" : : : "memory");
-    asm volatile ("isync" : : : "memory");
-}
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index 2174db237..eaade01b8 100644
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc64/tcg-target.h
@@ -82,24 +82,3 @@ enum {
 #define TCG_AREG1 TCG_REG_R24
 #define TCG_AREG2 TCG_REG_R25
 #define TCG_AREG3 TCG_REG_R26
-
-/* taken directly from tcg-dyngen.c */
-#define MIN_CACHE_LINE_SIZE 8 /* conservative value */
-
-static inline void flush_icache_range(unsigned long start, unsigned long stop)
-{
-    unsigned long p;
-
-    start &= ~(MIN_CACHE_LINE_SIZE - 1);
-    stop = (stop + MIN_CACHE_LINE_SIZE - 1) & ~(MIN_CACHE_LINE_SIZE - 1);
-
-    for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
-        asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
-    }
-    asm volatile ("sync" : : : "memory");
-    for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
-        asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
-    }
-    asm volatile ("sync" : : : "memory");
-    asm volatile ("isync" : : : "memory");
-}
diff --git a/tcg/tcg.c b/tcg/tcg.c
index e3a104cf5..f5399a191 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -43,6 +43,7 @@
 
 #include "config.h"
 #include "qemu-common.h"
+#include "cache-utils.h"
 
 /* Note: the long term plan is to reduce the dependancies on the QEMU
    CPU definitions. Currently they are used for qemu_ld/st
diff --git a/vl.c b/vl.c
index c6d888ce4..c3a8d8fc9 100644
--- a/vl.c
+++ b/vl.c
@@ -36,6 +36,7 @@
 #include "gdbstub.h"
 #include "qemu-timer.h"
 #include "qemu-char.h"
+#include "cache-utils.h"
 #include "block.h"
 #include "audio/audio.h"
 #include "migration.h"
@@ -4456,7 +4457,7 @@ static void termsig_setup(void)
 
 #endif
 
-int main(int argc, char **argv)
+int main(int argc, char **argv, char **envp)
 {
 #ifdef CONFIG_GDBSTUB
     int use_gdbstub;
@@ -4494,6 +4495,8 @@ int main(int argc, char **argv)
     int autostart;
     const char *incoming = NULL;
 
+    qemu_cache_utils_init(envp);
+
     LIST_INIT (&vm_change_state_head);
 #ifndef _WIN32
     {