From: Sowjanya Komatineni Date: Fri, 5 Apr 2019 00:14:08 +0000 (-0700) Subject: spi: tegra114: add 3 wire transfer mode support X-Git-Tag: Ubuntu-5.13.0-19.19~8364^2~25 X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=9d199231b000414e420a35912760f2d67e9c56d7;p=mirror_ubuntu-jammy-kernel.git spi: tegra114: add 3 wire transfer mode support This patch adds 3 wire transfer support to SPI mode list along with its implementation. 3 wire or Bi-directional mode uses only one serial data pin for the transfer. SPI in master mode uses MOSI data line only and MISO data line is not used. Signed-off-by: Sowjanya Komatineni Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 1e749ce13029..751672b3bc16 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -754,6 +754,11 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device *spi, else command1 &= ~SPI_LSBIT_FE; + if (spi->mode & SPI_3WIRE) + command1 |= SPI_BIDIROE; + else + command1 &= ~SPI_BIDIROE; + if (tspi->cs_control) { if (tspi->cs_control != spi) tegra_spi_writel(tspi, command1, SPI_COMMAND1); @@ -1158,7 +1163,7 @@ static int tegra_spi_probe(struct platform_device *pdev) /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST | - SPI_TX_DUAL | SPI_RX_DUAL; + SPI_TX_DUAL | SPI_RX_DUAL | SPI_3WIRE; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); master->setup = tegra_spi_setup; master->transfer_one_message = tegra_spi_transfer_one_message;