From: Lou, Yun <Yun.Lou@intel.com>
Date: Fri, 11 Mar 2022 15:58:51 +0000 (+0800)
Subject: MdeModulePkg/DxeIpl: Create 5-level page table for long mode
X-Git-Tag: edk2-stable202205~270
X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=a13dfc769bd7097d8d9ffe3e029a2c1d062d712b;p=mirror_edk2.git

MdeModulePkg/DxeIpl: Create 5-level page table for long mode

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2008

Correct the logic about whether 5-level paging is supported.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
---

diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index 0700f310b2..1ebab27820 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -15,7 +15,7 @@
     2) IA-32 Intel(R) Architecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
     3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
 
-Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -748,8 +748,8 @@ CreateIdentityMappingPageTables (
       CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,
       CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO,
       NULL,
-      &EcxFlags.Uint32,
       NULL,
+      &EcxFlags.Uint32,
       NULL
       );
     if (EcxFlags.Bits.FiveLevelPage != 0) {