From: Nick Reilly Date: Tue, 28 Feb 2017 12:08:15 +0000 (+0000) Subject: Add missing fp_access_check() to aarch64 crypto instructions X-Git-Tag: v2.9.0-rc2~108^2~19 X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=a4f5c5b72380deeccd53a6890ea3782f10ca8054;p=mirror_qemu.git Add missing fp_access_check() to aarch64 crypto instructions The aarch64 crypto instructions for AES and SHA are missing the check for if the FPU is enabled. Signed-off-by: Nick Reilly Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index e15eae6d41..24de30d92c 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -10933,6 +10933,10 @@ static void disas_crypto_aes(DisasContext *s, uint32_t insn) return; } + if (!fp_access_check(s)) { + return; + } + /* Note that we convert the Vx register indexes into the * index within the vfp.regs[] array, so we can share the * helper with the AArch32 instructions. @@ -10997,6 +11001,10 @@ static void disas_crypto_three_reg_sha(DisasContext *s, uint32_t insn) return; } + if (!fp_access_check(s)) { + return; + } + tcg_rd_regno = tcg_const_i32(rd << 1); tcg_rn_regno = tcg_const_i32(rn << 1); tcg_rm_regno = tcg_const_i32(rm << 1); @@ -11060,6 +11068,10 @@ static void disas_crypto_two_reg_sha(DisasContext *s, uint32_t insn) return; } + if (!fp_access_check(s)) { + return; + } + tcg_rd_regno = tcg_const_i32(rd << 1); tcg_rn_regno = tcg_const_i32(rn << 1);