From: Evan Lloyd <evan.lloyd@arm.com>
Date: Wed, 15 Jun 2016 12:52:40 +0000 (+0100)
Subject: ArmPlatformPkg: Remove double write in PL011
X-Git-Tag: edk2-stable201903~6852
X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=ca0aad698212bed2b65b4569cfeabcf7f0a7e88a;p=mirror_edk2.git

ArmPlatformPkg: Remove double write in PL011

The variable LineControl was initialised to zero, then updated in a
condition.  This change converts that to a write in each branch of the
condition, removing the Write/Read/Modify/Write sequence.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
---

diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
index d0f9381e9e..db15a8b322 100644
--- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
+++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
@@ -73,20 +73,19 @@ PL011UartInitializePort (
   UINT32      LineControl;
   UINT32      Divisor;
 
-  LineControl = 0;
-
   // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept
   // 1 char buffer as the minimum FIFO size. Because everything can be rounded
   // down, there is no maximum FIFO size.
   if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) {
     // Enable FIFO
-    LineControl |= PL011_UARTLCR_H_FEN;
+    LineControl = PL011_UARTLCR_H_FEN;
     if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4)
       *ReceiveFifoDepth = 32;
     else
       *ReceiveFifoDepth = 16;
   } else {
-    ASSERT (*ReceiveFifoDepth < 32);
+    // Disable FIFO
+    LineControl = 0;
     // Nothing else to do. 1 byte FIFO is default.
     *ReceiveFifoDepth = 1;
   }