From: Anthony Liguori <aliguori@amazon.com>
Date: Mon, 14 Oct 2013 16:15:47 +0000 (-0700)
Subject: Merge remote-tracking branch 'jliu/or32' into staging
X-Git-Tag: v1.7.0-rc0~58
X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=ded77da3cd6b6bcd201a4e36abb3294d725be644;hp=08683cb53286848913d4b58afb3f975a29d93535;p=qemu.git

Merge remote-tracking branch 'jliu/or32' into staging

# By Sebastian Macke
# Via Jia Liu
* jliu/or32:
  target-openrisc: Removes a non-conforming behavior for the first page of the memory
  target-openrisc: Correct handling of page faults.

Message-id: 1380789702-18935-1-git-send-email-proljc@gmail.com
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
---

diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c
index 57f5616e9..22d7cbec1 100644
--- a/target-openrisc/mmu.c
+++ b/target-openrisc/mmu.c
@@ -102,7 +102,7 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu,
         }
     }
 
-    if ((rw & 0) && ((right & PAGE_READ) == 0)) {
+    if (!(rw & 1) && ((right & PAGE_READ) == 0)) {
         return TLBRET_BADADDR;
     }
     if ((rw & 1) && ((right & PAGE_WRITE) == 0)) {
@@ -122,13 +122,6 @@ static int cpu_openrisc_get_phys_addr(OpenRISCCPU *cpu,
 {
     int ret = TLBRET_MATCH;
 
-    /* [0x0000--0x2000]: unmapped */
-    if (address < 0x2000 && (cpu->env.sr & SR_SM)) {
-        *physical = address;
-        *prot = PAGE_READ | PAGE_WRITE;
-        return ret;
-    }
-
     if (rw == 2) {    /* ITLB */
        *physical = 0;
         ret = cpu->env.tlb->cpu_openrisc_map_address_code(cpu, physical,