From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Tue, 8 Apr 2014 19:06:03 +0000 (-0700)
Subject: Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64... 
X-Git-Tag: Ubuntu-snapdragon-4.4.0-1050.54~10508
X-Git-Url: https://git.proxmox.com/?a=commitdiff_plain;h=e4f30545a23b6e22fb347a1ad034ce1aa280209c;p=mirror_ubuntu-artful-kernel.git

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull second set of arm64 updates from Catalin Marinas:
 "A second pull request for this merging window, mainly with fixes and
  docs clarification:

   - Documentation clarification on CPU topology and booting
     requirements
   - Additional cache flushing during boot (needed in the presence of
     external caches or under virtualisation)
   - DMA range invalidation fix for non cache line aligned buffers
   - Build failure fix with !COMPAT
   - Kconfig update for STRICT_DEVMEM"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: Fix DMA range invalidation for cache line unaligned buffers
  arm64: Add missing Kconfig for CONFIG_STRICT_DEVMEM
  arm64: fix !CONFIG_COMPAT build failures
  Revert "arm64: virt: ensure visibility of __boot_cpu_mode"
  arm64: Relax the kernel cache requirements for boot
  arm64: Update the TCR_EL1 translation granule definitions for 16K pages
  ARM: topology: Make it clear that all CPUs need to be described
---

e4f30545a23b6e22fb347a1ad034ce1aa280209c
diff --cc arch/arm64/kernel/head.S
index 1fe5d8d2bdfd,26109682d2fa..0fd565000772
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@@ -461,12 -476,26 +476,23 @@@ __create_page_tables
  	sub	x6, x6, #1			// inclusive range
  	create_block_map x0, x7, x3, x5, x6
  1:
 -#ifdef CONFIG_EARLY_PRINTK
  	/*
 -	 * Create the pgd entry for the UART mapping. The full mapping is done
 -	 * later based earlyprintk kernel parameter.
 +	 * Create the pgd entry for the fixed mappings.
  	 */
 -	ldr	x5, =EARLYCON_IOBASE		// UART virtual address
 +	ldr	x5, =FIXADDR_TOP		// Fixed mapping virtual address
  	add	x0, x26, #2 * PAGE_SIZE		// section table address
  	create_pgd_entry x26, x0, x5, x6, x7
 -#endif
+ 
+ 	/*
+ 	 * Since the page tables have been populated with non-cacheable
+ 	 * accesses (MMU disabled), invalidate the idmap and swapper page
+ 	 * tables again to remove any speculatively loaded cache lines.
+ 	 */
+ 	mov	x0, x25
+ 	add	x1, x26, #SWAPPER_DIR_SIZE
+ 	bl	__inval_cache_range
+ 
+ 	mov	lr, x27
  	ret
  ENDPROC(__create_page_tables)
  	.ltorg