From 01289ec36fc530aebefa38085655d1d656b3339f Mon Sep 17 00:00:00 2001 From: Harry Liebel Date: Tue, 9 Sep 2014 15:57:18 +0000 Subject: [PATCH] ArmPkg/ArmDisassemblerLib: ARMThumb and AArch64 fixes - Fix ARM Thumb mask operator. This was flagged by a toolchain as warning "use of logical '&&' with constant operand [-Wconstant-logical-operand]" - AArch64 should not be building the ARM32 disassemblers. - Add a AArch64 build target. The disassembler is still to be implemented. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel Reviewed-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16069 6f19259b-4bc3-4df7-8a09-765794883524 --- .../ArmDisassemblerLib/Aarch64Disassembler.c | 48 +++++++++++++++++++ .../ArmDisassemblerLib/ArmDisassemblerLib.inf | 13 ++--- .../ArmDisassemblerLib/ThumbDisassembler.c | 2 +- 3 files changed, 56 insertions(+), 7 deletions(-) create mode 100644 ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c diff --git a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c b/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c new file mode 100644 index 0000000000..3ecae77d33 --- /dev/null +++ b/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c @@ -0,0 +1,48 @@ +/** @file + Default exception handler + + Copyright (c) 2014, ARM Limited. All rights reserved. + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD + License which accompanies this distribution. The full text of the license may + be found at http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include + +/** + Place a disassembly of of **OpCodePtr into buffer, and update OpCodePtr to + point to next instruction. + + @param OpCodePtrPtr Pointer to pointer of instruction to disassemble. + @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream + @param Extended TRUE dump hex for instruction too. + @param ItBlock Size of IT Block + @param Buf Buffer to sprintf disassembly into. + @param Size Size of Buf in bytes. + +**/ +VOID +DisassembleInstruction ( + IN UINT8 **OpCodePtr, + IN BOOLEAN Thumb, + IN BOOLEAN Extended, + IN OUT UINT32 *ItBlock, + OUT CHAR8 *Buf, + OUT UINTN Size + ) +{ + // Not yet supported for AArch64. + // Put error in the buffer as we have no return code and the buffer may be + // printed directly so needs a '\0'. + AsciiSPrint (Buf, Size, "AArch64 not supported"); + return; +} diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf index 56ba2d2f39..bb51e30804 100644 --- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf +++ b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf @@ -1,7 +1,7 @@ #/** @file -# Semihosting serail port lib +# ARM Disassembler library # -# Copyright (c) 2008, Apple Inc. All rights reserved.
+# Copyright (c) 2008, Apple Inc. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -15,17 +15,20 @@ [Defines] INF_VERSION = 0x00010005 - BASE_NAME = SemiHostingSerialPortLib + BASE_NAME = ArmDisassemblerLib FILE_GUID = 7ACEC173-F15D-426C-8F2F-BD86B4183EF1 MODULE_TYPE = BASE VERSION_STRING = 1.0 LIBRARY_CLASS = ArmDisassemblerLib -[Sources.common] +[Sources.ARM] ArmDisassembler.c ThumbDisassembler.c +[Sources.AARCH64] + Aarch64Disassembler.c + [Packages] MdePkg/MdePkg.dec ArmPkg/ArmPkg.dec @@ -35,5 +38,3 @@ PrintLib DebugLib PeCoffGetEntryPointLib - - diff --git a/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c index 108cda9442..5bad3afcfb 100644 --- a/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c +++ b/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c @@ -934,7 +934,7 @@ DisassembleThumbInstruction ( case CMN_THUMB2: // CMN , #} - Target = (OpCode32 & 0xff) | ((OpCode >> 4) && 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0); + Target = (OpCode32 & 0xff) | ((OpCode >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0); AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #0x%x", gReg[Rn], Target); return; -- 2.39.2