From 055fa1c6661dfb421568ab73ca6a7e4f723f60de Mon Sep 17 00:00:00 2001
From: Eric Dong <eric.dong@intel.com>
Date: Wed, 2 Aug 2017 18:26:43 +0800
Subject: [PATCH] QuarkSocPkg MtrrLib: Enhance get mtrr mask logic.

In order to not use the deprecated macro, refine
get mtrr mask value logic.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
---
 QuarkSocPkg/QuarkNorthCluster/Library/MtrrLib/MtrrLib.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/QuarkSocPkg/QuarkNorthCluster/Library/MtrrLib/MtrrLib.c b/QuarkSocPkg/QuarkNorthCluster/Library/MtrrLib/MtrrLib.c
index 58d8c0d4c4..2760427554 100644
--- a/QuarkSocPkg/QuarkNorthCluster/Library/MtrrLib/MtrrLib.c
+++ b/QuarkSocPkg/QuarkNorthCluster/Library/MtrrLib/MtrrLib.c
@@ -1036,13 +1036,12 @@ MtrrLibInitializeMtrrMask (
     AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
 
     PhysicalAddressBits = (UINT8) RegEax;
-
-    *MtrrValidBitsMask    = LShiftU64 (1, PhysicalAddressBits) - 1;
-    *MtrrValidAddressMask = *MtrrValidBitsMask & 0xfffffffffffff000ULL;
   } else {
-    *MtrrValidBitsMask    = MTRR_LIB_MSR_VALID_MASK;
-    *MtrrValidAddressMask = MTRR_LIB_CACHE_VALID_ADDRESS;
+    PhysicalAddressBits = 36;
   }
+
+  *MtrrValidBitsMask    = LShiftU64 (1, PhysicalAddressBits) - 1;
+  *MtrrValidAddressMask = *MtrrValidBitsMask & 0xfffffffffffff000ULL;
 }
 
 
-- 
2.39.2