From 0d317ce99e226a338fe0962e711795c6a8ed2cb2 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Sat, 9 Apr 2016 10:57:56 +0100 Subject: [PATCH] drm/i915: Use simplest form for flushing the single cacheline in the HWS Rather than call a function to compute the matching cachelines and clflush them, just call the clflush *instruction* directly. We also know that we can use the unpatched plain clflush rather than the clflushopt alternative. Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Imre Deak Reviewed-by: Mika Kuoppala Link: http://patchwork.freedesktop.org/patch/msgid/1460195877-20520-4-git-send-email-chris@chris-wilson.co.uk --- drivers/gpu/drm/i915/intel_ringbuffer.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 29c54cc1ee5c..9d7b7bf9ed14 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -385,8 +385,9 @@ intel_ring_sync_index(struct intel_engine_cs *engine, static inline void intel_flush_status_page(struct intel_engine_cs *engine, int reg) { - drm_clflush_virt_range(&engine->status_page.page_addr[reg], - sizeof(uint32_t)); + mb(); + clflush(&engine->status_page.page_addr[reg]); + mb(); } static inline u32 -- 2.39.5