From 2fb7357d50efaffc43409cd2cfe30d6ceebff315 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Fri, 11 Sep 2020 10:25:28 +0200 Subject: [PATCH] net: ag71xx: add flow control support Add flow control support. The functionality was tested on AR9331 SoC and confirmed by iperf3 results and HW counters exported over ethtool. Following test configurations was used: iMX6S receiver <--- TL-SG1005D switch <---- AR9331 sender The switch is supporting symmytric flow control: Settings for eth0: Supported ports: [ MII ] Supported link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full Supported pause frame use: Symmetric Receive-only Supports auto-negotiation: Yes Supported FEC modes: Not reported Advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full Advertised pause frame use: Symmetric Advertised auto-negotiation: Yes Advertised FEC modes: Not reported Link partner advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full --->> Link partner advertised pause frame use: Symmetric Link partner advertised auto-negotiation: Yes Link partner advertised FEC modes: Not reported Speed: 100Mb/s Duplex: Full Auto-negotiation: on Port: MII PHYAD: 4 Transceiver: external Link detected: yes The iMX6S system was configured to 10Mbit, to let the switch use flow control: - ethtool -s eth0 speed 10 With flow control disabled on AR9331: - ethtool -A eth0 rx off tx off - iperf3 -u -c 172.17.0.1 -b100M -l1472 -t10 [ ID] Interval Transfer Bitrate Jitter Lost/Total Datagrams [ 5] 0.00-10.00 sec 66.2 MBytes 55.5 Mbits/sec 0.000 ms 0/47155 (0%) sender [ 5] 0.00-10.04 sec 11.5 MBytes 9.57 Mbits/sec 1.309 ms 38986/47146 (83%) receiver With flow control enabled on AR9331: - ethtool -A eth0 rx on tx on - iperf3 -u -c 172.17.0.1 -b100M -l1472 -t10 [ ID] Interval Transfer Bitrate Jitter Lost/Total Datagrams [ 5] 0.00-10.00 sec 15.1 MBytes 12.6 Mbits/sec 0.000 ms 0/10727 (0%) sender [ 5] 0.00-10.05 sec 11.5 MBytes 9.57 Mbits/sec 1.371 ms 2525/10689 (24%) receiver Similar results are get in opposite direction by introducing extra CPU load on AR9331: - chrt 40 dd if=/dev/zero of=/dev/null & Signed-off-by: Oleksij Rempel Signed-off-by: David S. Miller --- drivers/net/ethernet/atheros/ag71xx.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/atheros/ag71xx.c b/drivers/net/ethernet/atheros/ag71xx.c index 8c80a87aee58..dd5c8a9038bb 100644 --- a/drivers/net/ethernet/atheros/ag71xx.c +++ b/drivers/net/ethernet/atheros/ag71xx.c @@ -1056,6 +1056,8 @@ static void ag71xx_mac_validate(struct phylink_config *config, phylink_set(mask, MII); + phylink_set(mask, Pause); + phylink_set(mask, Asym_Pause); phylink_set(mask, Autoneg); phylink_set(mask, 10baseT_Half); phylink_set(mask, 10baseT_Full); @@ -1106,7 +1108,7 @@ static void ag71xx_mac_link_up(struct phylink_config *config, bool tx_pause, bool rx_pause) { struct ag71xx *ag = netdev_priv(to_net_dev(config->dev)); - u32 cfg2; + u32 cfg1, cfg2; u32 ifctl; u32 fifo5; @@ -1140,6 +1142,15 @@ static void ag71xx_mac_link_up(struct phylink_config *config, ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5); ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl); + cfg1 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG1); + cfg1 &= ~(MAC_CFG1_TFC | MAC_CFG1_RFC); + if (tx_pause) + cfg1 |= MAC_CFG1_TFC; + + if (rx_pause) + cfg1 |= MAC_CFG1_RFC; + ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, cfg1); + ag71xx_hw_start(ag); } -- 2.39.5