From 32c26a56af3ae823a883e926b96e3ff00854e6a8 Mon Sep 17 00:00:00 2001 From: Liu Ying Date: Mon, 14 Mar 2016 16:10:08 +0800 Subject: [PATCH] gpu: ipu-v3: ipu-dmfc: Protect function ipu_dmfc_init_channel() with mutex To avoid race condition issue, we should protect the function ipu_dmfc_init_channel() with the mutex dmfc->priv->mutex, since it configures the register DMFC_GENERAL1 at runtime which contains several control bits for various display channels. This matches better with fine grained locking logic in upper layer. Signed-off-by: Liu Ying Signed-off-by: Philipp Zabel --- drivers/gpu/ipu-v3/ipu-dmfc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/ipu-v3/ipu-dmfc.c b/drivers/gpu/ipu-v3/ipu-dmfc.c index 042c3958e2a0..129ccfa9d1d6 100644 --- a/drivers/gpu/ipu-v3/ipu-dmfc.c +++ b/drivers/gpu/ipu-v3/ipu-dmfc.c @@ -355,6 +355,8 @@ int ipu_dmfc_init_channel(struct dmfc_channel *dmfc, int width) struct ipu_dmfc_priv *priv = dmfc->priv; u32 dmfc_gen1; + mutex_lock(&priv->mutex); + dmfc_gen1 = readl(priv->base + DMFC_GENERAL1); if ((dmfc->slots * 64 * 4) / width > dmfc->data->max_fifo_lines) @@ -364,6 +366,8 @@ int ipu_dmfc_init_channel(struct dmfc_channel *dmfc, int width) writel(dmfc_gen1, priv->base + DMFC_GENERAL1); + mutex_unlock(&priv->mutex); + return 0; } EXPORT_SYMBOL_GPL(ipu_dmfc_init_channel); -- 2.39.5