From 55f67014d7b4a1228754313917ccca5539764802 Mon Sep 17 00:00:00 2001
From: Pete Batard <pete@akeo.ie>
Date: Wed, 28 Mar 2018 23:55:21 +0800
Subject: [PATCH] MdePkg/Library/BaseCpuLib: Enable VS2017/ARM64 builds

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
---
 .../BaseCpuLib/AArch64/CpuFlushTlb.asm        | 39 ++++++++++++++++++
 .../Library/BaseCpuLib/AArch64/CpuSleep.asm   | 40 +++++++++++++++++++
 MdePkg/Library/BaseCpuLib/BaseCpuLib.inf      |  8 ++--
 3 files changed, 84 insertions(+), 3 deletions(-)
 create mode 100644 MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm
 create mode 100644 MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm

diff --git a/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm b/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm
new file mode 100644
index 0000000000..aee9049fba
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm
@@ -0,0 +1,39 @@
+;------------------------------------------------------------------------------
+;
+; CpuFlushTlb() for ARM
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+  EXPORT CpuFlushTlb
+  AREA BaseCpuLib_LowLevel, CODE, READONLY
+
+;/**
+;  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+;  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuFlushTlb (
+;  VOID
+;  );
+;
+CpuFlushTlb
+  tlbi  vmalle1                 // Invalidate Inst TLB and Data TLB
+  dsb   sy
+  isb
+  ret
+
+  END
diff --git a/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm b/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm
new file mode 100644
index 0000000000..7481c225d7
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; CpuSleep() for AArch64
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2011 - 2013, ARM LTD. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+  EXPORT CpuSleep
+  AREA BaseCpuLib_LowLevel, CODE, READONLY
+
+;/**
+;  Places the CPU in a sleep state until an interrupt is received.
+;
+;  Places the CPU in a sleep state until an interrupt is received. If interrupts
+;  are disabled prior to calling this function, then the CPU will be placed in a
+;  sleep state indefinitely.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuSleep (
+;  VOID
+;  );
+;
+
+CpuSleep
+  wfi
+  ret
+
+  END
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index 996446ec1a..dad08dfe7f 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Instance of CPU Library for various architecture.
 #
-#  CPU Library implemented using ASM functions for IA-32 and X64,
+#  CPU Library implemented using ASM functions for IA32, X64, ARM, AARCH64,
 #  PAL CALLs for IPF, and empty functions for EBC.
 #
 #  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
@@ -71,8 +71,10 @@
   Arm/CpuSleep.S      | GCC  
 
 [Sources.AARCH64]
-  AArch64/CpuFlushTlb.S | GCC
-  AArch64/CpuSleep.S    | GCC
+  AArch64/CpuFlushTlb.S   | GCC
+  AArch64/CpuSleep.S      | GCC
+  AArch64/CpuFlushTlb.asm | MSFT
+  AArch64/CpuSleep.asm    | MSFT
 
 [Packages]
   MdePkg/MdePkg.dec
-- 
2.39.2