From 6f3a5282e068c09de026b5f777b7052e5318e484 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Fri, 12 May 2017 00:14:37 +0000 Subject: [PATCH] arm64: dts: r8a7796: add Sound SSI PIO support Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 64 +++++++++++++++++++++++- 1 file changed, 62 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 0a76a1c53082..5c6e54a1e27a 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -1165,7 +1165,42 @@ }; rcar_sound: sound@ec500000 { - /* placeholder */ + /* + * #sound-dai-cells is required + * + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; + */ + /* + * #clock-cells is required for audio_clkout0/1/2/3 + * + * clkout : #clock-cells = <0>; <&rcar_sound>; + * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; + */ + compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; + reg = <0 0xec500000 0 0x1000>, /* SCU */ + <0 0xec5a0000 0 0x100>, /* ADG */ + <0 0xec540000 0 0x1000>, /* SSIU */ + <0 0xec541000 0 0x280>, /* SSI */ + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; + + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&audio_clk_a>, <&audio_clk_b>, + <&audio_clk_c>, + <&cpg CPG_CORE R8A7796_CLK_S0D4>; + clock-names = "ssi-all", + "ssi.9", "ssi.8", "ssi.7", "ssi.6", + "ssi.5", "ssi.4", "ssi.3", "ssi.2", + "ssi.1", "ssi.0", + "clk_a", "clk_b", "clk_c", "clk_i"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; rcar_sound,dvc { dvc0: dvc-0 { @@ -1184,9 +1219,34 @@ rcar_sound,ssi { ssi0: ssi-0 { + interrupts = ; }; - ssi1: ssi-1 { + interrupts = ; + }; + ssi2: ssi-2 { + interrupts = ; + }; + ssi3: ssi-3 { + interrupts = ; + }; + ssi4: ssi-4 { + interrupts = ; + }; + ssi5: ssi-5 { + interrupts = ; + }; + ssi6: ssi-6 { + interrupts = ; + }; + ssi7: ssi-7 { + interrupts = ; + }; + ssi8: ssi-8 { + interrupts = ; + }; + ssi9: ssi-9 { + interrupts = ; }; }; }; -- 2.39.5