From 7927092253da598331542bdedb8fd5612f161f80 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 8 May 2016 00:08:05 +0300 Subject: [PATCH] sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga() sh_eth_chip_reset_giga() doesn't really need to use direct iowrite32() when writing to the ARSTR register, it can use sh_eth_tsu_write() as all other chip_reset() methods. Signed-off-by: Sergei Shtylyov Signed-off-by: David S. Miller --- drivers/net/ethernet/renesas/sh_eth.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index 07e29638299f..23678e7cce6b 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c @@ -725,8 +725,9 @@ static struct sh_eth_cpu_data sh7757_data = { #define GIGA_MAHR(port) (SH_GIGA_ETH_BASE + 0x800 * (port) + 0x05c0) static void sh_eth_chip_reset_giga(struct net_device *ndev) { - int i; + struct sh_eth_private *mdp = netdev_priv(ndev); u32 mahr[2], malr[2]; + int i; /* save MAHR and MALR */ for (i = 0; i < 2; i++) { @@ -735,7 +736,7 @@ static void sh_eth_chip_reset_giga(struct net_device *ndev) } /* reset device */ - iowrite32(ARSTR_ARST, (void *)(SH_GIGA_ETH_BASE + 0x1800)); + sh_eth_tsu_write(mdp, ARSTR_ARST, ARSTR); mdelay(1); /* restore MAHR and MALR */ -- 2.39.5