From 815a67426681d057d09c56bf58137b222847fdbb Mon Sep 17 00:00:00 2001
From: pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Thu, 10 Jul 2008 17:17:54 +0000
Subject: [PATCH] Fix coprocessor register types.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4866 c046a42c-6fe2-441c-8c8c-71466251a162
---
 target-m68k/translate.c | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 9486c31d7..e3e56d036 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -36,6 +36,17 @@
 
 //#define DEBUG_DISPATCH 1
 
+/* Fake floating point.  */
+#define TCG_TYPE_F32 TCG_TYPE_I32
+#define TCG_TYPE_F64 TCG_TYPE_I64
+#define tcg_gen_mov_f64 tcg_gen_mov_i64
+#define tcg_gen_qemu_ldf32 tcg_gen_qemu_ld32u
+#define tcg_gen_qemu_ldf64 tcg_gen_qemu_ld64
+#define tcg_gen_qemu_stf32 tcg_gen_qemu_st32
+#define tcg_gen_qemu_stf64 tcg_gen_qemu_st64
+#define gen_helper_pack_32_f32 tcg_gen_mov_i32
+#define gen_helper_pack_f32_32 tcg_gen_mov_i32
+
 #define DEFO32(name, offset) static TCGv QREG_##name;
 #define DEFO64(name, offset) static TCGv QREG_##name;
 #define DEFF64(name, offset) static TCGv QREG_##name;
@@ -91,13 +102,13 @@ void m68k_tcg_init(void)
                                           offsetof(CPUM68KState, aregs[i]), p);
         p += 3;
         sprintf(p, "F%d", i);
-        cpu_fregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
+        cpu_fregs[i] = tcg_global_mem_new(TCG_TYPE_F64, TCG_AREG0,
                                           offsetof(CPUM68KState, fregs[i]), p);
         p += 3;
     }
     for (i = 0; i < 4; i++) {
         sprintf(p, "ACC%d", i);
-        cpu_macc[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
+        cpu_macc[i] = tcg_global_mem_new(TCG_TYPE_I64, TCG_AREG0,
                                          offsetof(CPUM68KState, macc[i]), p);
         p += 5;
     }
@@ -172,17 +183,6 @@ typedef void (*disas_proc)(DisasContext *, uint16_t);
 /* FIXME: Remove this.  */
 #define gen_im32(val) tcg_const_i32(val)
 
-/* Fake floating point.  */
-#define TCG_TYPE_F32 TCG_TYPE_I32
-#define TCG_TYPE_F64 TCG_TYPE_I64
-#define tcg_gen_mov_f64 tcg_gen_mov_i64
-#define tcg_gen_qemu_ldf32 tcg_gen_qemu_ld32u
-#define tcg_gen_qemu_ldf64 tcg_gen_qemu_ld64
-#define tcg_gen_qemu_stf32 tcg_gen_qemu_st32
-#define tcg_gen_qemu_stf64 tcg_gen_qemu_st64
-#define gen_helper_pack_32_f32 tcg_gen_mov_i32
-#define gen_helper_pack_f32_32 tcg_gen_mov_i32
-
 #define QMODE_I32 TCG_TYPE_I32
 #define QMODE_I64 TCG_TYPE_I64
 #define QMODE_F32 TCG_TYPE_F32
-- 
2.39.5